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Thu, 22 Jan 2026 09:03:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769072627; bh=/MehKJmORgEwpJF+msBgFBXkm59BZbIQr2N6eBZwaBU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=mzS2xZFueyQor31YESEgMROI8UCRsNdNneVBo50jCEGgFSMndbkcVLiq094C9Jgwo 35xH5C7NvzIFyWXvYPRYokoInGijcOBS0s7kTSD2rs1/MqN9zduYtpaudJCO+JuAqG qcWHYywg7hKt7GdHjeGmWDOUYJB6iwtmm/ueYCQLgRuZFzV2GbCuKXuU2MXYlJakLG aH44EBU6o0ftXLIKcH4ybHu24Fk6i93FHqusQwGGBCq7PliSXGB5LtBmwErA8ofuSI 1bNHoT4dAhRVT8PtymGXeVJ7cNMHyPdS0U6tbkBKYlgKT3Kc03EbDVdYMvih9iEmwv v/QGCAMt1Lw/Q== Date: Thu, 22 Jan 2026 10:03:33 +0100 From: Niklas Cassel To: Koichiro Den Cc: jingoohan1@gmail.com, mani@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org, bhelgaas@google.com, vigneshr@ti.com, s-vadapalli@ti.com, hongxing.zhu@nxp.com, l.stach@pengutronix.de, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com, jesper.nilsson@axis.com, heiko@sntech.de, srikanth.thokala@intel.com, marek.vasut+renesas@gmail.com, yoshihiro.shimoda.uh@renesas.com, geert+renesas@glider.be, magnus.damm@gmail.com, christian.bruel@foss.st.com, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, thierry.reding@gmail.com, jonathanh@nvidia.com, hayashi.kunihiko@socionext.com, mhiramat@kernel.org, kishon@kernel.org, jirislaby@kernel.org, rongqianfeng@vivo.com, 18255117159@163.com, shawn.lin@rock-chips.com, nicolas.frattaroli@collabora.com, linux.amoon@gmail.com, vidyas@nvidia.com, Frank.Li@nxp.com, linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@axis.com, linux-rockchip@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-tegra@vger.kernel.org Subject: Re: [PATCH v9 2/5] PCI: endpoint: Add BAR subrange mapping support Message-ID: References: <20260122084909.2390865-1-den@valinux.co.jp> <20260122084909.2390865-3-den@valinux.co.jp> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260122084909.2390865-3-den@valinux.co.jp> On Thu, Jan 22, 2026 at 05:49:06PM +0900, Koichiro Den wrote: > Some endpoint platforms have only a small number of usable BARs. At the > same time, EPF drivers (e.g. vNTB) may need multiple independent inbound > regions (control/scratchpad, one or more memory windows, and optionally > MSI or other feature-related regions). Subrange mapping allows these to > share a single BAR without consuming additional BARs that may not be > available, or forcing a fragile layout by aggressively packing into a > single contiguous memory range. > > Extend the PCI endpoint core to support mapping subranges within a BAR. > Add an optional 'submap' field in struct pci_epf_bar so an endpoint > function driver can request inbound mappings that fully cover the BAR. > > Introduce a new EPC feature bit, subrange_mapping, and reject submap > requests from pci_epc_set_bar() unless the controller advertises both > subrange_mapping and dynamic_inbound_mapping features. > > The submap array describes the complete BAR layout (no overlaps and no > gaps are allowed to avoid exposing untranslated address ranges). This > provides the generic infrastructure needed to map multiple logical > regions into a single BAR at different offsets, without assuming a > controller-specific inbound address translation mechanism. > > Signed-off-by: Koichiro Den > --- Reviewed-by: Niklas Cassel