From: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com>
To: Kai-Heng Feng <kai.heng.feng@canonical.com>, bhelgaas@google.com
Cc: linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org, koba.ko@canonical.com,
Oliver O'Halloran <oohall@gmail.com>,
mika.westerberg@linux.intel.com
Subject: Re: [PATCH v2 2/2] PCI/DPC: Disable DPC service when link is in L2/L3 ready, L2 and L3 state
Date: Sat, 19 Mar 2022 13:40:20 -0700 [thread overview]
Message-ID: <aa810b71-89b2-f18e-5564-d65ed421b8d9@linux.intel.com> (raw)
In-Reply-To: <20220127025418.1989642-2-kai.heng.feng@canonical.com>
On 1/26/22 6:54 PM, Kai-Heng Feng wrote:
> Since TLP and DLLP transmission is disabled for a Link in L2/L3 Ready,
> L2 and L3 (i.e. device in D3hot and D3cold), and DPC depends on AER, so
Better description about the problem would be helpful. I know you
have included a log in AER patch. But a quick summary of the problem
in this patch will make it easier to read the patch.
> also disable DPC here.
>
> Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
> ---
> v2:
> - Wording change.
> - Empty line dropped.
>
> drivers/pci/pcie/dpc.c | 60 +++++++++++++++++++++++++++++++-----------
> 1 file changed, 44 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c
> index 3e9afee02e8d1..414258967f08e 100644
> --- a/drivers/pci/pcie/dpc.c
> +++ b/drivers/pci/pcie/dpc.c
> @@ -343,13 +343,33 @@ void pci_dpc_init(struct pci_dev *pdev)
> }
> }
>
> +static void dpc_enable(struct pcie_device *dev)
> +{
> + struct pci_dev *pdev = dev->port;
> + u16 ctl;
> +
> + pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl);
> + ctl = (ctl & 0xfff4) | PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN;
> + pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, ctl);
> +}
> +
> +static void dpc_disable(struct pcie_device *dev)
> +{
> + struct pci_dev *pdev = dev->port;
> + u16 ctl;
> +
> + pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl);
> + ctl &= ~(PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN);
> + pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, ctl);
> +}
> +
> #define FLAG(x, y) (((x) & (y)) ? '+' : '-')
> static int dpc_probe(struct pcie_device *dev)
> {
> struct pci_dev *pdev = dev->port;
> struct device *device = &dev->device;
> int status;
> - u16 ctl, cap;
> + u16 cap;
>
> if (!pcie_aer_is_native(pdev) && !pcie_ports_dpc_native)
> return -ENOTSUPP;
> @@ -364,10 +384,7 @@ static int dpc_probe(struct pcie_device *dev)
> }
>
> pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap);
> - pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl);
> -
> - ctl = (ctl & 0xfff4) | PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN;
> - pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, ctl);
> + dpc_enable(dev);
> pci_info(pdev, "enabled with IRQ %d\n", dev->irq);
>
> pci_info(pdev, "error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n",
> @@ -380,22 +397,33 @@ static int dpc_probe(struct pcie_device *dev)
> return status;
> }
>
> -static void dpc_remove(struct pcie_device *dev)
> +static int dpc_suspend(struct pcie_device *dev)
> {
> - struct pci_dev *pdev = dev->port;
> - u16 ctl;
> + dpc_disable(dev);
> + return 0;
> +}
>
> - pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl);
> - ctl &= ~(PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN);
> - pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, ctl);
> +static int dpc_resume(struct pcie_device *dev)
> +{
> + dpc_enable(dev);
> + return 0;
> +}
> +
> +static void dpc_remove(struct pcie_device *dev)
> +{
> + dpc_disable(dev);
> }
>
> static struct pcie_port_service_driver dpcdriver = {
> - .name = "dpc",
> - .port_type = PCIE_ANY_PORT,
> - .service = PCIE_PORT_SERVICE_DPC,
> - .probe = dpc_probe,
> - .remove = dpc_remove,
> + .name = "dpc",
> + .port_type = PCIE_ANY_PORT,
> + .service = PCIE_PORT_SERVICE_DPC,
> + .probe = dpc_probe,
> + .suspend = dpc_suspend,
> + .resume = dpc_resume,
> + .runtime_suspend = dpc_suspend,
> + .runtime_resume = dpc_resume,
> + .remove = dpc_remove,
> };
>
> int __init pcie_dpc_init(void)
--
Sathyanarayanan Kuppuswamy
Linux Kernel Developer
next prev parent reply other threads:[~2022-03-19 20:42 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-27 2:54 [PATCH v2 1/2] PCI/AER: Disable AER service when link is in L2/L3 ready, L2 and L3 state Kai-Heng Feng
2022-01-27 2:54 ` [PATCH v2 2/2] PCI/DPC: Disable DPC " Kai-Heng Feng
2022-01-27 6:31 ` Mika Westerberg
2022-03-19 20:40 ` Sathyanarayanan Kuppuswamy [this message]
2022-01-27 6:30 ` [PATCH v2 1/2] PCI/AER: Disable AER " Mika Westerberg
2022-01-27 7:01 ` Lu Baolu
2022-01-27 11:14 ` Kai-Heng Feng
2022-01-28 2:53 ` Lu Baolu
2022-01-28 3:29 ` Kai-Heng Feng
2022-03-19 20:38 ` Sathyanarayanan Kuppuswamy
2022-03-21 2:38 ` Kai-Heng Feng
2022-03-21 3:52 ` Sathyanarayanan Kuppuswamy
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