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From: Roland Dreier <rdreier@cisco.com>
To: Arnd Bergmann <arnd@arndb.de>
Subject: Re: [patch 9/9] powerpc/cell: Add DMA_ATTR_STRONG_ORDERING dma
	attribute and use in IOMMU code
References: <20080715195139.316677337@arndb.de>
	<20080715195740.098068951@arndb.de> <ada3amaevj5.fsf@cisco.com>
	<200807152327.06946.arnd@arndb.de>
Date: Tue, 15 Jul 2008 19:18:46 -0700
In-Reply-To: <200807152327.06946.arnd@arndb.de> (Arnd Bergmann's message of
	"Tue, 15 Jul 2008 23:27:06 +0200")
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Cc: Mark Nelson <markn@au1.ibm.com>, linuxppc-dev@ozlabs.org,
	cbe-oss-dev@ozlabs.org
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 > This is all about inbound transfers, i.e. DMAs coming from the I/O bridge
 > into the CPU, both DMA read and DMA write.

OK -- at a minimum I think the documentation should make that clear.  As
it stands the description of what this does is pretty much impossible to
parse and understand.

 > Strong ordering is only active when both the bridge and the IOMMU enable
 > it, but for correctly written drivers, this only results in a slowdown.

So when would someone use this dma attribute?  As a hack to fix drivers
where the real fix is too complicated?

 - R.