[PATCH] [POWERPC] Add cputable entry for PowerPC 440SPe Rev. B

[PATCH] [POWERPC] Add cputable entry for PowerPC 440SPe Rev. B

[Roland Dreier]

Add a cputable entry for revision B of the AMCC 440SPe.  When adding
this entry, we need to adjust the entry for 440SP Rev. A so that it
matches more bits of the PVR, since the 440SPe Rev. B has PVR
53421891, which would match the old 440SP PVR pattern of 53xxx891.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
---
I'm still working on cleaning up the PCI Express changes for 440SPe
Rev. B support but I think we might as well queue this up at least.

I haven't heard from Matt in a while so maybe you could pick this up
directly Paul?

Thanks,
  Roland

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index b742013..869d5fe 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1123,8 +1123,8 @@ static struct cpu_spec cpu_specs[] = {
 		.platform		= "ppc440",
 	},
 	{ /* 440SP Rev. A */
-		.pvr_mask		= 0xff000fff,
-		.pvr_value		= 0x53000891,
+		.pvr_mask		= 0xfff00fff,
+		.pvr_value		= 0x53200891,
 		.cpu_name		= "440SP Rev. A",
 		.cpu_features		= CPU_FTRS_44X,
 		.cpu_user_features	= COMMON_USER_BOOKE,
@@ -1133,8 +1133,8 @@ static struct cpu_spec cpu_specs[] = {
 		.platform		= "ppc440",
 	},
 	{ /* 440SPe Rev. A */
-		.pvr_mask		= 0xff000fff,
-		.pvr_value		= 0x53000890,
+		.pvr_mask		= 0xfff00fff,
+		.pvr_value		= 0x53400890,
 		.cpu_name		= "440SPe Rev. A",
 		.cpu_features		= CPU_FTRS_44X,
 		.cpu_user_features	= COMMON_USER_BOOKE,
@@ -1142,6 +1142,16 @@ static struct cpu_spec cpu_specs[] = {
 		.dcache_bsize		= 32,
 		.platform		= "ppc440",
 	},
+	{ /* 440SPe Rev. B */
+		.pvr_mask		= 0xfff00fff,
+		.pvr_value		= 0x53400891,
+		.cpu_name		= "440SPe Rev. B",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features	= COMMON_USER_BOOKE,
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+		.platform		= "ppc440",
+	},
 #endif /* CONFIG_44x */
 #ifdef CONFIG_FSL_BOOKE
 	{	/* e200z5 */

Re: [PATCH] [POWERPC] Add cputable entry for PowerPC 440SPe Rev. B

[Josh Boyer]

On Thu, 2007-01-11 at 14:18 -0800, Roland Dreier wrote:
> Add a cputable entry for revision B of the AMCC 440SPe.  When adding
> this entry, we need to adjust the entry for 440SP Rev. A so that it
> matches more bits of the PVR, since the 440SPe Rev. B has PVR
> 53421891, which would match the old 440SP PVR pattern of 53xxx891.

Is Rev. B the one found on the AMCC Katmai board?

josh

Re: [PATCH] [POWERPC] Add cputable entry for PowerPC 440SPe Rev. B

[Roland Dreier]

 > > Add a cputable entry for revision B of the AMCC 440SPe.  When adding
 > > this entry, we need to adjust the entry for 440SP Rev. A so that it
 > > matches more bits of the PVR, since the 440SPe Rev. B has PVR
 > > 53421891, which would match the old 440SP PVR pattern of 53xxx891.
 > 
 > Is Rev. B the one found on the AMCC Katmai board?

I would guess so -- it's the current rev.

I don't have a katmai board (just a yucca reworked with a rev. b chip)

 - R.

Re: [PATCH] [POWERPC] Add cputable entry for PowerPC 440SPe Rev. B

[Josh Boyer]

On Thu, 2007-01-11 at 15:58 -0800, Roland Dreier wrote:
>  > > Add a cputable entry for revision B of the AMCC 440SPe.  When adding
>  > > this entry, we need to adjust the entry for 440SP Rev. A so that it
>  > > matches more bits of the PVR, since the 440SPe Rev. B has PVR
>  > > 53421891, which would match the old 440SP PVR pattern of 53xxx891.
>  >
>  > Is Rev. B the one found on the AMCC Katmai board?
> 
> I would guess so -- it's the current rev.
> 
> I don't have a katmai board (just a yucca reworked with a rev. b chip)

Ok.  I'm supposedly getting a 440SPe board soon, so I guess I'll find
out soon enough.

josh

[PATCH] [POWERPC] Add cputable entry for PowerPC 440SPe Rev. B

[Roland Dreier]

When adding the cputable entry for 440SPe Rev. B, we also need to
adjust the existing entries for 440SP Rev. A and 440SPe Rev. B so that
they look more bits of the PVR.  The 440SPe Rev. B has PVR 53421891,
which would match the current 440SP Rev. A pattern of 53xxx891.  To
distinguish between 440SP and 440SPe, we need to use the first three
digits of the PVR, which are respectively 532 and 534.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
---
Here's a patch I've had for a while -- I think it may as well go in,
although I haven't had a chance to put much work into moving
Yucca/Katmai 440SPe support to arch/powerpc, so I'll probably miss
2.6.23 for the rest of it.

 arch/powerpc/kernel/cputable.c   |   20 +++-
 arch/ppc/syslib/ppc440spe_pcie.c |  219 +++++++++++++++++++++++++++-----------
 2 files changed, 172 insertions(+), 67 deletions(-)

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index b2b5d66..157e6e3 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1178,8 +1178,8 @@ static struct cpu_spec cpu_specs[] = {
 		.platform		= "ppc440",
 	},
 	{ /* 440SP Rev. A */
-		.pvr_mask		= 0xff000fff,
-		.pvr_value		= 0x53000891,
+		.pvr_mask		= 0xfff00fff,
+		.pvr_value		= 0x53200891,
 		.cpu_name		= "440SP Rev. A",
 		.cpu_features		= CPU_FTRS_44X,
 		.cpu_user_features	= COMMON_USER_BOOKE,
@@ -1188,9 +1188,19 @@ static struct cpu_spec cpu_specs[] = {
 		.platform		= "ppc440",
 	},
 	{ /* 440SPe Rev. A */
-		.pvr_mask		= 0xff000fff,
-		.pvr_value		= 0x53000890,
-		.cpu_name		= "440SPe Rev. A",
+		.pvr_mask               = 0xfff00fff,
+		.pvr_value              = 0x53400890,
+		.cpu_name               = "440SPe Rev. A",
+		.cpu_features		= CPU_FTRS_44X,
+		.cpu_user_features      = COMMON_USER_BOOKE,
+		.icache_bsize           = 32,
+		.dcache_bsize           = 32,
+		.platform               = "ppc440",
+	},
+	{ /* 440SPe Rev. B */
+		.pvr_mask		= 0xfff00fff,
+		.pvr_value		= 0x53400891,
+		.cpu_name		= "440SPe Rev. B",
 		.cpu_features		= CPU_FTRS_44X,
 		.cpu_user_features	= COMMON_USER_BOOKE,
 		.icache_bsize		= 32,

Re: [PATCH] [POWERPC] Add cputable entry for PowerPC 440SPe Rev. B

[Olof Johansson]

Hi,

On Fri, Jun 15, 2007 at 12:36:32PM -0700, Roland Dreier wrote:
> When adding the cputable entry for 440SPe Rev. B, we also need to
> adjust the existing entries for 440SP Rev. A and 440SPe Rev. B so that
> they look more bits of the PVR.  The 440SPe Rev. B has PVR 53421891,
> which would match the current 440SP Rev. A pattern of 53xxx891.  To
> distinguish between 440SP and 440SPe, we need to use the first three
> digits of the PVR, which are respectively 532 and 534.

I can see why you need to distinguish between 440SP and SPe, but do you
really need separate cputable entries for rev A and B? Revisions are
normally reported separately and the cputable entries look identical?


-Olof