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Peter Anvin" Subject: Re: [RFC PATCH v3 09/13] x86/cpu/topology: Initialize sbm topology after topology parsing Message-ID: References: <20261001192849.74788-1-kprateek.nayak@amd.com> <20261001192849.74788-10-kprateek.nayak@amd.com> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261001192849.74788-10-kprateek.nayak@amd.com> Hello Prateek, On Thu, Oct 01, 2026 at 07:28:45PM +0000, K Prateek Nayak wrote: [ snip ] > +static __init void init_sbm_topology(u32 max_apicid) > +{ > + u32 sbm_shift = x86_topo_system.dom_shifts[TOPO_DIE_DOMAIN] - 1; As sashiko reported, and also mentioned here: https://lore.kernel.org/lkml/20260510155920.2587431-2-yu.c.chen@intel.com/ Maybe x86_topo_system.dom_shifts[TOPO_DIE_DOMAIN - 1] ? > + int num_sbm_instances, max_threads_per_instance; > + > + /* > + * On Intel systems, memory controllers are present at TOPO_DIE_DOMAIN. > + * On newer AMD and Hygon systems, LLC is at TOPO_TILE_DOMAIN so use > + * that instead. > + */ > + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || > + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) > + sbm_shift = x86_topo_system.dom_shifts[TOPO_TILE_DOMAIN] - 1; Ditto. thanks, Chenyu