From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yXjcQ6DdszDrLq for ; Thu, 9 Nov 2017 23:47:34 +1100 (AEDT) Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vA9Ci5oq071391 for ; Thu, 9 Nov 2017 07:47:32 -0500 Received: from e38.co.us.ibm.com (e38.co.us.ibm.com [32.97.110.159]) by mx0b-001b2d01.pphosted.com with ESMTP id 2e4ktau0kp-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 09 Nov 2017 07:47:31 -0500 Received: from localhost by e38.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 9 Nov 2017 05:47:30 -0700 Subject: Re: [PATCH v3] powerpc/kernel/sysfs: Export ldbar spr to sysfs To: mpe@ellerman.id.au Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, maddy@linux.vnet.ibm.com References: <1510229604-5839-1-git-send-email-anju@linux.vnet.ibm.com> From: Anju T Sudhakar Date: Thu, 9 Nov 2017 18:17:24 +0530 MIME-Version: 1.0 In-Reply-To: <1510229604-5839-1-git-send-email-anju@linux.vnet.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Message-Id: List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi, Kindly ignore this patch, I send a wrong version. Will send out the right one. Thanks, Anju On Thursday 09 November 2017 05:43 PM, Anju T Sudhakar wrote: > Add ldbar spr to sysfs. The spr holds thread level In-Memory Collection (IMC) > counter configuration data. Exposing this will help to understand the current > configuration of thread-level counters in the system. > Primarily, Bit 0 of ldbar says whether the counters are enabled or not. > And bit 1 indicates the mode (if 0-Accumulation Mode/if 1-Trace Mode). > > Signed-off-by: Anju T Sudhakar > --- > arch/powerpc/kernel/sysfs.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c > index 4437c70..f8caee0 100644 > --- a/arch/powerpc/kernel/sysfs.c > +++ b/arch/powerpc/kernel/sysfs.c > @@ -485,6 +485,7 @@ SYSFS_PMCSETUP(mmcra, SPRN_MMCRA); > SYSFS_SPRSETUP(purr, SPRN_PURR); > SYSFS_SPRSETUP(spurr, SPRN_SPURR); > SYSFS_SPRSETUP(pir, SPRN_PIR); > +SYSFS_SPRSETUP(ldbar, SPRN_LDBAR); > > /* > Lets only enable read for phyp resources and > @@ -492,6 +493,7 @@ SYSFS_SPRSETUP(pir, SPRN_PIR); > Lets be conservative and default to pseries. > */ > static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra); > +static DEVICE_ATTR(ldbar, 0400, show_ldbar, store_ldbar); > static DEVICE_ATTR(spurr, 0400, show_spurr, NULL); > static DEVICE_ATTR(purr, 0400, show_purr, store_purr); > static DEVICE_ATTR(pir, 0400, show_pir, NULL); > @@ -757,6 +759,9 @@ static int register_cpu_online(unsigned int cpu) > device_create_file(s, &pmc_attrs[i]); > > #ifdef CONFIG_PPC64 > + if (cpu_has_feature(CPU_FTR_ARCH_300)) > + device_create_file(s, &dev_attr_ldbar); > + > if (cpu_has_feature(CPU_FTR_MMCRA)) > device_create_file(s, &dev_attr_mmcra); > > @@ -842,6 +847,9 @@ static int unregister_cpu_online(unsigned int cpu) > device_remove_file(s, &pmc_attrs[i]); > > #ifdef CONFIG_PPC64 > + if (cpu_has_feature(CPU_FTR_ARCH_300)) > + device_remove_file(s, &dev_attr_ldbar); > + > if (cpu_has_feature(CPU_FTR_MMCRA)) > device_remove_file(s, &dev_attr_mmcra); >