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Tue, 8 Nov 2022 05:16:19 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CFA2CAE04D; Tue, 8 Nov 2022 05:16:19 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 79425AE045; Tue, 8 Nov 2022 05:16:19 +0000 (GMT) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 8 Nov 2022 05:16:19 +0000 (GMT) Received: from li-0d7fa1cc-2c9d-11b2-a85c-aed20764436d.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 0F2C06036F; Tue, 8 Nov 2022 16:16:18 +1100 (AEDT) Message-ID: Subject: Re: [PATCH v9 6/7] powerpc/code-patching: Use temporary mm for Radix MMU From: Benjamin Gray To: Christophe Leroy , "linuxppc-dev@lists.ozlabs.org" Date: Tue, 08 Nov 2022 16:16:17 +1100 In-Reply-To: References: <20221025044409.448755-1-bgray@linux.ibm.com> <20221025044409.448755-7-bgray@linux.ibm.com> <5c1976e4-8a66-2651-3968-5f23d9cb9bd3@csgroup.eu> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.44.4 (3.44.4-2.fc36) MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: i-BnQTMILQBSXjo5wp4_nJh_yi82KEjk X-Proofpoint-GUID: wbKeury8kLknobv3BYzPvU4EYIPCRU2o X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-07_11,2022-11-07_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 spamscore=0 mlxscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211080025 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "jniethe5@gmail.com" , "npiggin@gmail.com" , "ajd@linux.ibm.com" , "cmr@bluescreens.de" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, 2022-11-03 at 14:10 +1100, Benjamin Gray wrote: > On Wed, 2022-11-02 at 10:11 +0000, Christophe Leroy wrote: > > Le 25/10/2022 =C3=A0 06:44, Benjamin Gray a =C3=A9crit=C2=A0: > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0/* > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * PTE allocation uses GFP= _KERNEL which means we need to > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * pre-allocate the PTE he= re because we cannot do the > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * allocation during patch= ing when IRQs are disabled. > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 */ > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pgdp =3D pgd_offset(mm, ad= dr); > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0p4dp =3D p4d_alloc(mm, pgd= p, addr); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (WARN_ON(!p4dp)) > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0goto fail_no_p4d; > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pudp =3D pud_alloc(mm, p4d= p, addr); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (WARN_ON(!pudp)) > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0goto fail_no_pud; > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0pmdp =3D pmd_alloc(mm, pud= p, addr); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (WARN_ON(!pmdp)) > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0goto fail_no_pmd; > > > + > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0ptep =3D pte_alloc_map(mm,= pmdp, addr); > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0if (WARN_ON(!ptep)) > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0goto fail_no_pte; > >=20 > > Insn't there standard generic functions to do that ? > >=20 > > For instance, __get_locked_pte() seems to do more or less the same. >=20 > __get_locked_pte invokes walk_to_pmd, which leaks memory if the > allocation fails. This may not be a concern necessarily at boot > (though > I still don't like it), but startup is run every time a CPU comes > online, so the leak is theoretically unbounded. >=20 > There's no need to leak it in this context, because we know that each > page is exclusively used by the corresponding patching mm. I found tlb_gather_mmu() to initialise a struct mmu_gather, so I've removed all the open coding (it should free any partial page tables if get_locked_pte fails). Currently running it through CI before posting, will probably get the v10 out tomorrow.