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From: "Alan Bennett" <embedded@akb.net>
To: "Scott Wood" <scottwood@freescale.com>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: Timers on mpc8248 etc...
Date: Wed, 28 Nov 2007 21:06:36 -0700	[thread overview]
Message-ID: <bfa0697f0711282006o235c987eg80732114e489befd@mail.gmail.com> (raw)
In-Reply-To: <474DFD15.603@freescale.com>

It comes from uboot.  Can you point me in the right direction to make
sure its right?
               PowerPC,8248@0 {
                       device_type = "cpu";
                       reg = <0>;
                       d-cache-line-size = <d#32>;
                       i-cache-line-size = <d#32>;
                       d-cache-size = <d#16384>;
                       i-cache-size = <d#16384>;
                       timebase-frequency = <0>;
                       clock-frequency = <0>;
               };


On 11/28/07, Scott Wood <scottwood@freescale.com> wrote:
> Alan Bennett wrote:
> > I've got a routine that needs to delay for X microseconds, this is a
> > must.  The command after schedule_timeout must has to wait for the HW
> > to complete a task that takes X microseconds.
> >
> > I would think that one way to do this is with a simple
> > schedule_timeout.  But in the example below, the time that passes from
> > run1() to dontrun() is far less than 3.2 msecs.  Infact, sometimes its
> > ~ 800 micros according the a analyzer looking at points triggered in
> > run1() and donrun().  Could this be a configuration problem with the
> > timer/interrupt that generates the jiffies?
>
> Are you sure the timebase frequency is set correctly in the device tree?
>
> -Scott
>

  reply	other threads:[~2007-11-29  4:06 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-11-28 23:41 Timers on mpc8248 etc Alan Bennett
2007-11-28 23:43 ` Scott Wood
2007-11-29  4:06   ` Alan Bennett [this message]
2007-11-29 11:31     ` Vitaly Bordug
2007-11-29 13:50       ` Alan Bennett
2007-11-29 19:05         ` Alan Bennett

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