From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from yw-out-2324.google.com (yw-out-2324.google.com [74.125.46.30]) by ozlabs.org (Postfix) with ESMTP id D12F5DDF91 for ; Tue, 30 Sep 2008 21:07:27 +1000 (EST) Received: by yw-out-2324.google.com with SMTP id 5so367859ywh.39 for ; Tue, 30 Sep 2008 04:07:26 -0700 (PDT) Message-ID: Date: Tue, 30 Sep 2008 13:07:26 +0200 From: "Leon Woestenberg" To: "=?ISO-8859-1?Q?Andr=E9_Schwarz?=" , linuxppc-dev@ozlabs.org Subject: Re: How to prevent embedded ppc reset deadlock? (MPC83xx/85xx) In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 References: <48E14DAE.9040101@matrix-vision.de> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Andr=E9, On Tue, Sep 30, 2008 at 12:05 AM, Leon Woestenberg wrote: >> Since you also have to assert HRESET when you assert PORESET >> > But when I assert PORESET, the processor will assert HRESET itself > AFAIK, so why do this? > >> you can wire-or them with a low drop schottky diode. >> MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 1, section 4.2.2, page 4-6: "Directly after the negation of PORESET, the device starts the configuration process. The device asserts HRESET throughout the power-on reset process, including configuration" So, I will not drive HRESET myself but depend on the ppc to drive it for me= . Regards, --=20 Leon