Re: ppc4xx: u-boot sees PCIe endpoint, linux does not.

["Leon Woestenberg" <leon.woestenberg@gmail.com>]

Hello all,

On Mon, Dec 1, 2008 at 9:12 AM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> On Fri, 2008-11-28 at 13:50 +0100, Leon Woestenberg wrote:
>>
>> AMCC PPC460EX canyonlands board with an FPGA PCIe end point:
>>
>> u-boot sees the end point, but Linux does not:
>>
>> U-Boot 1.3.3-00249-ga524e11 (Jun 30 2008 - 16:05:51)
>> CPU:   AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200, OPB=100, EBC=100 MHz)
>> <...>
>> Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 16
>> <...>
>> PCIE1: successfully set as root-complex
>>         02  00  2071  2071  00ff  00
>>
>> Now, if I re-program the end-point FPGA during the u-boot boot
>> time-out, Linux will recognize the end-point.
>>
> It's possible that either the reset in between goes bonkers or something
> else causes your FPGA to stop responding. It looks like a programming
> problem with the FPGA to me.
>
I have verified that the end point does not receive any kind of reset.

Also, this problem only happens on the Canyonlands board; on x86 and
powerpc MPC8315E it remains properly working after soft/hard resets,
u-boot init etc.

Could it be u-boot overwrites a too large payload into the config
space or something similar, which makes subsequent accesses fail?

Regards,
-- 
Leon