From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-fx0-f228.google.com (mail-fx0-f228.google.com [209.85.220.228]) by ozlabs.org (Postfix) with ESMTP id C443CB7B7A for ; Sun, 20 Sep 2009 04:31:20 +1000 (EST) Received: by fxm28 with SMTP id 28so1478269fxm.41 for ; Sat, 19 Sep 2009 11:31:17 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <4AB1B84F.8080606@embedded-sol.com> References: <4AB1B84F.8080606@embedded-sol.com> Date: Sat, 19 Sep 2009 20:31:17 +0200 Message-ID: Subject: Re: FPGA access over PCI-E on MPC8536 From: Leon Woestenberg To: Felix Radensky , Greg KH , Greg KH Content-Type: text/plain; charset=ISO-8859-1 Cc: linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hello Felix, On Thu, Sep 17, 2009 at 6:17 AM, Felix Radensky wrote: > On my custom MPC8536 based board running 2.6.31 kernel > FPGA is connected via x2 PCI-E lane. FPGA is identified > during PCI scan and is visible via lspci. > I committed a PCI Express device driver for an Altera FPGA (chaining DMA reference) design upstream that resides in the upstream Linux kernel at drivers/staging/altpciechdma/ It can act as a reference for the generic part of your design. Regards, -- Leon