[PATCH v2] PCI/AER: Only clear error bits in PCIe Device Status register

[PATCH v2] PCI/AER: Only clear error bits in PCIe Device Status register

[Shuai Xue]

Currently, pcie_clear_device_status() clears the entire PCIe Device
Status register (PCI_EXP_DEVSTA) by writing back the value read from
the register, which affects not only the error status bits but also
other writable bits.

According to PCIe Base Specification r7.0, sec 7.5.3.5 (Device Status
Register), this register contains:

- RW1C error status bits (CED, NFED, FED, URD at bits 0-3): These are
  the four error status bits that need to be cleared.

- Read-only bits (AUXPD at bit 4, TRPND at bit 5): Writing to these
  has no effect.

- Emergency Power Reduction Detected (bit 6): A RW1C non-error bit
  introduced in PCIe r5.0 (2019). This is currently the only writable
  non-error bit in the Device Status register. Unconditionally
  clearing this bit can interfere with other software components that
  rely on this power management indication.

- Reserved bits (RsvdZ): These bits are required to be written as
  zero. Writing 1s to them (as the current implementation may do)
  violates the specification.

To prevent unintended side effects, modify pcie_clear_device_status()
to only write 1s to the four error status bits (CED, NFED, FED, URD),
leaving the Emergency Power Reduction Detected bit and reserved bits
unaffected.

Fixes: ec752f5d54d7 ("PCI/AER: Clear device status bits during ERR_FATAL and ERR_NONFATAL")
Cc: stable@vger.kernel.org
Suggested-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Shuai Xue <xueshuai@linux.alibaba.com>
---
changes since v1:
- Correct the commit message to be more specific per Lukas and Cameron
- Add Reviewed-by tag from Kuppuswamy Sathyanarayanan
- Send this patch individually instead of as part of a series
---
 drivers/pci/pci.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 13dbb405dc31..2ceb81ebead8 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2243,10 +2243,11 @@ EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);
 #ifdef CONFIG_PCIEAER
 void pcie_clear_device_status(struct pci_dev *dev)
 {
-	u16 sta;
-
-	pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &sta);
-	pcie_capability_write_word(dev, PCI_EXP_DEVSTA, sta);
+	pcie_capability_write_word(dev, PCI_EXP_DEVSTA,
+				    PCI_EXP_DEVSTA_CED |
+				    PCI_EXP_DEVSTA_NFED |
+				    PCI_EXP_DEVSTA_FED |
+				    PCI_EXP_DEVSTA_URD);
 }
 #endif
 
-- 
2.43.5

Re: [PATCH v2] PCI/AER: Only clear error bits in PCIe Device Status register

[Lukas Wunner]

On Wed, Feb 11, 2026 at 01:48:16PM +0800, Shuai Xue wrote:
> +++ b/drivers/pci/pci.c
> @@ -2243,10 +2243,11 @@ EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state);
>  #ifdef CONFIG_PCIEAER
>  void pcie_clear_device_status(struct pci_dev *dev)
>  {
> -	u16 sta;
> -
> -	pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &sta);
> -	pcie_capability_write_word(dev, PCI_EXP_DEVSTA, sta);
> +	pcie_capability_write_word(dev, PCI_EXP_DEVSTA,
> +				    PCI_EXP_DEVSTA_CED |
> +				    PCI_EXP_DEVSTA_NFED |
> +				    PCI_EXP_DEVSTA_FED |
> +				    PCI_EXP_DEVSTA_URD);

Isn't there one too many blanks before each of the PCI_EXP_DEVSTA_* macros?

The available space would be sufficient to accommodate two macros per line,
so just 2 instead of 4 lines for the macros.

Otherwise this is:
Reviewed-by: Lukas Wunner <lukas@wunner.de>

Re: [PATCH v2] PCI/AER: Only clear error bits in PCIe Device Status register

[Shuai Xue]

On 2/11/26 8:34 PM, Lukas Wunner wrote:
> Isn't there one too many blanks before each of the PCI_EXP_DEVSTA_* macros?
> 
> The available space would be sufficient to accommodate two macros per line,
> so just 2 instead of 4 lines for the macros.
> 
> Otherwise this is:
> Reviewed-by: Lukas Wunner<lukas@wunner.de>

Sure, will send a new patch to fix it.

Thanks.
Shuai