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* Relocating interrupt vectors in ppc440?
@ 2005-01-27 18:05 Shawn Jin
  2005-01-27 18:16 ` Matt Porter
  0 siblings, 1 reply; 5+ messages in thread
From: Shawn Jin @ 2005-01-27 18:05 UTC (permalink / raw)
  To: linuxppc

Hi,

Do interrupt vectors locate at low addresses physically in ppc440?
>From the processor's user manual I understand that the base address of
interrupt vectors actually can be anywhere, set by IVPR. Also from
head_44x.S I found the following comments

/*
 * The Book E MMUs are always on so we don't need to handle
 * interrupts in real mode as with previous PPC processors. In
 * this case we handle interrupts in the kernel virtual address
 * space.
 *
 * Interrupt vectors are dynamically placed relative to the
 * interrupt prefix as determined by the address of interrupt_base.
 * The interrupt vectors offsets are programmed using the labels
 * for each interrupt vector entry.
 *
 */

The address of interrupt_base is 0xc0000224 in the image I built,
which is a virtual address from kernel point of view. What's the
corresponding physical address? Is it my SDRAM's physical base address
+ 0x224 (the offset)?

Assumed that the interrupt vectors locate at the low address space
physically and given that there is 2GB SDRAM shared by two ppc440
cores, can one of linux kernels run at the top of 1GB space? This
means the interrupt vectors for this copy need to move to upper 1GB.
Each core runs a copy of linux kernel independently.

Any ideas about relocating interupt vectors in ppc440?

Thanks a lot.
-Shawn.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: Relocating interrupt vectors in ppc440?
  2005-01-27 18:05 Relocating interrupt vectors in ppc440? Shawn Jin
@ 2005-01-27 18:16 ` Matt Porter
  2005-01-27 20:18   ` Shawn Jin
  0 siblings, 1 reply; 5+ messages in thread
From: Matt Porter @ 2005-01-27 18:16 UTC (permalink / raw)
  To: Shawn Jin; +Cc: linuxppc

On Thu, Jan 27, 2005 at 10:05:33AM -0800, Shawn Jin wrote:
> Hi,
> 
> Do interrupt vectors locate at low addresses physically in ppc440?

Yes.

> >From the processor's user manual I understand that the base address of
> interrupt vectors actually can be anywhere, set by IVPR. Also from
> head_44x.S I found the following comments
> 
> /*
>  * The Book E MMUs are always on so we don't need to handle
>  * interrupts in real mode as with previous PPC processors. In
>  * this case we handle interrupts in the kernel virtual address
>  * space.
>  *
>  * Interrupt vectors are dynamically placed relative to the
>  * interrupt prefix as determined by the address of interrupt_base.
>  * The interrupt vectors offsets are programmed using the labels
>  * for each interrupt vector entry.
>  *
>  */
> 
> The address of interrupt_base is 0xc0000224 in the image I built,
> which is a virtual address from kernel point of view. What's the
> corresponding physical address? Is it my SDRAM's physical base address
> + 0x224 (the offset)?

Yes.

> Assumed that the interrupt vectors locate at the low address space
> physically and given that there is 2GB SDRAM shared by two ppc440
> cores, can one of linux kernels run at the top of 1GB space? This
> means the interrupt vectors for this copy need to move to upper 1GB.
> Each core runs a copy of linux kernel independently.

Yes, you'd have to do something like the APUS code does by settings
PPC_MEMSTART appropriately for the second processor. Also, of course
limiting the memory on the first processor to 1GB. There's probably
a lot of fall out from PPC_MEMSTART being non-zero. I seem to
recall lots of assumptions about PPC_MEMSTART being at zero as
I was doing the ppc440 core work. You'll have to audit all the
MM paths for these assumptions, but it can be done.

> Any ideas about relocating interupt vectors in ppc440?

One idea is that if you really don't have to do it, then don't. :)

-Matt

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: Relocating interrupt vectors in ppc440?
  2005-01-27 18:16 ` Matt Porter
@ 2005-01-27 20:18   ` Shawn Jin
  2005-01-27 20:41     ` Matt Porter
  0 siblings, 1 reply; 5+ messages in thread
From: Shawn Jin @ 2005-01-27 20:18 UTC (permalink / raw)
  To: linuxppc

First thank you for your valuable response.

> > Assumed that the interrupt vectors locate at the low address space
> > physically and given that there is 2GB SDRAM shared by two ppc440
> > cores, can one of linux kernels run at the top of 1GB space? This
> > means the interrupt vectors for this copy need to move to upper 1GB.
> > Each core runs a copy of linux kernel independently.
> 
> Yes, you'd have to do something like the APUS code does by settings
> PPC_MEMSTART appropriately for the second processor. Also, of course

I guess the value set to PPC_MEMSTART should be the offset to the
physical starting address of 2GB SDRAM not the absolute physical
address, right?

> limiting the memory on the first processor to 1GB. There's probably

Limiting the memory on the first processor to 1GB can be done by
setting the mem size to 1GB in boot arguments (mem=1024MB)?

> One idea is that if you really don't have to do it, then don't. :)

The SoC is designed in this way that two cores share the DDR but it's
not SMP. Two kernels have to run independently. Relocating interrupt
vectors to upper 1GB memory means that another copy of kernel can run
at upper memory, right. So I'm afraid I have to do that. :(

Thanks,
-Shawn.

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: Relocating interrupt vectors in ppc440?
  2005-01-27 20:18   ` Shawn Jin
@ 2005-01-27 20:41     ` Matt Porter
  2005-01-28  1:55       ` Shawn Jin
  0 siblings, 1 reply; 5+ messages in thread
From: Matt Porter @ 2005-01-27 20:41 UTC (permalink / raw)
  To: Shawn Jin; +Cc: linuxppc

On Thu, Jan 27, 2005 at 12:18:45PM -0800, Shawn Jin wrote:
> First thank you for your valuable response.
> 
> > > Assumed that the interrupt vectors locate at the low address space
> > > physically and given that there is 2GB SDRAM shared by two ppc440
> > > cores, can one of linux kernels run at the top of 1GB space? This
> > > means the interrupt vectors for this copy need to move to upper 1GB.
> > > Each core runs a copy of linux kernel independently.
> > 
> > Yes, you'd have to do something like the APUS code does by settings
> > PPC_MEMSTART appropriately for the second processor. Also, of course
> 
> I guess the value set to PPC_MEMSTART should be the offset to the
> physical starting address of 2GB SDRAM not the absolute physical
> address, right?

It would be 0x00000000 for the first processor and 0x40000000 for the
second processor. Note that head_44x.S is a major place where a lot
of "system memory is at zero" assumptions take place that need to
be addressed for the second processor.
 
> > limiting the memory on the first processor to 1GB. There's probably
> 
> Limiting the memory on the first processor to 1GB can be done by
> setting the mem size to 1GB in boot arguments (mem=1024MB)?

Correct, but for a SoC port where this is a static configuration, you
can simply make your "find_end_of_memory()" routine return 1GB.

> > One idea is that if you really don't have to do it, then don't. :)
> 
> The SoC is designed in this way that two cores share the DDR but it's
> not SMP. Two kernels have to run independently. Relocating interrupt
> vectors to upper 1GB memory means that another copy of kernel can run
> at upper memory, right. So I'm afraid I have to do that. :(

That's a shame. This sounds identical to a 440-based standard product
that IBM had planned (and cancelled) when they still owned the 4xx
standard product line.
 
-Matt

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: Relocating interrupt vectors in ppc440?
  2005-01-27 20:41     ` Matt Porter
@ 2005-01-28  1:55       ` Shawn Jin
  0 siblings, 0 replies; 5+ messages in thread
From: Shawn Jin @ 2005-01-28  1:55 UTC (permalink / raw)
  To: linuxppc

> > I guess the value set to PPC_MEMSTART should be the offset to the
> > physical starting address of 2GB SDRAM not the absolute physical
> > address, right?
> 
> It would be 0x00000000 for the first processor and 0x40000000 for the
> second processor. Note that head_44x.S is a major place where a lot
> of "system memory is at zero" assumptions take place that need to
> be addressed for the second processor.

The theory behind changing PPC_MEMSTART is to change MMU configuration
and to let it translate 0xC0000000 to 0x40000000 for the 2nd
processor. Right?

One place I found the assumption is when loading the kernel physical address.
	/* Kernel is at the base of RAM */
	li r4, 0			/* Load the kernel physical address */

I'll find out more places as you indicated.

Best regards,
-Shawn.

^ permalink raw reply	[flat|nested] 5+ messages in thread

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-- links below jump to the message on this page --
2005-01-27 18:05 Relocating interrupt vectors in ppc440? Shawn Jin
2005-01-27 18:16 ` Matt Porter
2005-01-27 20:18   ` Shawn Jin
2005-01-27 20:41     ` Matt Porter
2005-01-28  1:55       ` Shawn Jin

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