From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from rproxy.gmail.com (rproxy.gmail.com [64.233.170.197]) by ozlabs.org (Postfix) with ESMTP id A80E167A86 for ; Fri, 28 Jan 2005 05:05:37 +1100 (EST) Received: by rproxy.gmail.com with SMTP id 1so278591rny for ; Thu, 27 Jan 2005 10:05:33 -0800 (PST) Message-ID: Date: Thu, 27 Jan 2005 10:05:33 -0800 From: Shawn Jin To: linuxppc Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Subject: Relocating interrupt vectors in ppc440? Reply-To: Shawn Jin List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi, Do interrupt vectors locate at low addresses physically in ppc440? >>From the processor's user manual I understand that the base address of interrupt vectors actually can be anywhere, set by IVPR. Also from head_44x.S I found the following comments /* * The Book E MMUs are always on so we don't need to handle * interrupts in real mode as with previous PPC processors. In * this case we handle interrupts in the kernel virtual address * space. * * Interrupt vectors are dynamically placed relative to the * interrupt prefix as determined by the address of interrupt_base. * The interrupt vectors offsets are programmed using the labels * for each interrupt vector entry. * */ The address of interrupt_base is 0xc0000224 in the image I built, which is a virtual address from kernel point of view. What's the corresponding physical address? Is it my SDRAM's physical base address + 0x224 (the offset)? Assumed that the interrupt vectors locate at the low address space physically and given that there is 2GB SDRAM shared by two ppc440 cores, can one of linux kernels run at the top of 1GB space? This means the interrupt vectors for this copy need to move to upper 1GB. Each core runs a copy of linux kernel independently. Any ideas about relocating interupt vectors in ppc440? Thanks a lot. -Shawn.