From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from py-out-1112.google.com (py-out-1112.google.com [64.233.166.180]) by ozlabs.org (Postfix) with ESMTP id 516CF67B32 for ; Fri, 18 Aug 2006 05:01:49 +1000 (EST) Received: by py-out-1112.google.com with SMTP id f25so785338pyf for ; Thu, 17 Aug 2006 12:01:48 -0700 (PDT) Message-ID: Date: Thu, 17 Aug 2006 12:01:48 -0700 From: "Shawn Jin" To: ppcdev Subject: PCIe enhanced configuration mechanism support on ppc arch MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Hi, I'm trying to find out if the current PCI subsystem supports the PCIe enhanced configuration mechanism, in particular, on the ppc/powerpc arch, which is basically a MMIO access with the address containing all bus, device, function, and offset info. Could someone here give an authoritative answer? Or point me to somewhere I can look for it by myself, such as which file or directory in the kernel tree. I searched at arch/ppc/kernel, arch/powerpc/kernel, and drivers/pci but couldn't find an answer. :( Thanks, -Shawn.