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From: Michael Neuling <mikey@neuling.org>
To: Breno Leitao <leitao@debian.org>, linuxppc-dev@lists.ozlabs.org
Cc: ldufour@linux.vnet.ibm.com, cyrilbur@gmail.com,
	gromero@linux.vnet.ibm.com
Subject: Re: [RFC PATCH 03/14] powerpc/tm: Recheckpoint when exiting from kernel
Date: Thu, 15 Nov 2018 11:11:04 +1100	[thread overview]
Message-ID: <c46ccc2b5ef581ad802e55e5e61119f67d184fcc.camel@neuling.org> (raw)
In-Reply-To: <1541508028-31865-4-git-send-email-leitao@debian.org>

On Tue, 2018-11-06 at 10:40 -0200, Breno Leitao wrote:
> This is the only place we are going to recheckpoint now. Now the task
> needs to have TIF_RESTORE_TM flag set, which will get into
> restore_tm_state() at exception exit path, and execute the recheckpoint
> depending on the MSR.
> 
> Every time a task is required to recheckpoint, or just have the TM SPRs
> restore, the TIF_RESTORE_TM flag should be set and the task MSR should
> properly be in a transactional state, which will be checked by
> restore_tm_state().
> 
> After the facility registers are recheckpointed, they are clobbered with
> the values that were recheckpointed (and are now also in the checkpoint
> area).

Which facility registers? I don't understand this.

> If facility is enabled at MSR that is being returned to user space, then
> the facility registers need to be restored, otherwise userspace will see
> invalid values.
> 
> This patch simplify the restore_tm_state() to just restore the facility
> registers that are enabled when returning to userspace, i.e. the MSR will
> be the same that will be put into SRR1, which will be the MSR after RFID.
> 
> Signed-off-by: Breno Leitao <leitao@debian.org>
> ---
>  arch/powerpc/kernel/process.c | 38 ++++++++++++++++++++++++-----------
>  1 file changed, 26 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
> index 4d5322cfad25..c7e758a42b8f 100644
> --- a/arch/powerpc/kernel/process.c
> +++ b/arch/powerpc/kernel/process.c
> @@ -1049,8 +1049,6 @@ static inline void __switch_to_tm(struct task_struct
> *prev,
>   */
>  void restore_tm_state(struct pt_regs *regs)
>  {
> -	unsigned long msr_diff;
> -
>  	/*
>  	 * This is the only moment we should clear TIF_RESTORE_TM as
>  	 * it is here that ckpt_regs.msr and pt_regs.msr become the same
> @@ -1061,19 +1059,35 @@ void restore_tm_state(struct pt_regs *regs)
>  	if (!MSR_TM_ACTIVE(regs->msr))
>  		return;
>  
> -	msr_diff = current->thread.ckpt_regs.msr & ~regs->msr;
> -	msr_diff &= MSR_FP | MSR_VEC | MSR_VSX;
> +	tm_enable();
> +	/* The only place we recheckpoint */
> +	tm_recheckpoint(&current->thread);
>  
> -	/* Ensure that restore_math() will restore */
> -	if (msr_diff & MSR_FP)
> -		current->thread.load_fp = 1;
> +	/*
> +	 * Restore the facility registers that were clobbered during
> +	 * recheckpoint.
> +	 */
> +	if (regs->msr & MSR_FP) {
> +		/*
> +		 * Using load_fp_state() instead of restore_fp() because we
> +		 * want to force the restore, independent of
> +		 * tsk->thread.load_fp. Same for other cases below.
> +		 */
> +		load_fp_state(&current->thread.fp_state);
> +	}
>  #ifdef CONFIG_ALTIVEC
> -	if (cpu_has_feature(CPU_FTR_ALTIVEC) && msr_diff & MSR_VEC)
> -		current->thread.load_vec = 1;
> +	if (cpu_has_feature(CPU_FTR_ALTIVEC) && regs->msr & MSR_VEC)
> +		load_vr_state(&current->thread.vr_state);
> +#endif
> +#ifdef CONFIG_VSX
> +	if (cpu_has_feature(CPU_FTR_VSX) && regs->msr & MSR_VSX) {
> +		/*
> +		 * If VSX is enabled, it is expected that VEC and FP are
> +		 * also enabled and already restored the full register set.
> +		 * Cause a warning if that is not the case.
> +		 */
> +		WARN_ON(!(regs->msr & MSR_VEC) || !(regs->msr & MSR_FP)); }
>  #endif
> -	restore_math(regs);
> -
> -	regs->msr |= msr_diff;
>  }
>  
>  #else

  reply	other threads:[~2018-11-15  0:13 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-06 12:40 [RFC PATCH v2 00/14] New TM Model Breno Leitao
2018-11-06 12:40 ` [RFC PATCH 01/14] powerpc/tm: Reclaim transaction on kernel entry Breno Leitao
2018-11-15  0:06   ` Michael Neuling
2018-11-15  0:51   ` Nicholas Piggin
2018-11-06 12:40 ` [RFC PATCH 02/14] powerpc/tm: Reclaim on unavailable exception Breno Leitao
2018-11-15  0:06   ` Michael Neuling
2018-11-06 12:40 ` [RFC PATCH 03/14] powerpc/tm: Recheckpoint when exiting from kernel Breno Leitao
2018-11-15  0:11   ` Michael Neuling [this message]
2018-11-06 12:40 ` [RFC PATCH 04/14] powerpc/tm: Always set TIF_RESTORE_TM on reclaim Breno Leitao
2018-11-06 12:40 ` [RFC PATCH 05/14] powerpc/tm: Refactor the __switch_to_tm code Breno Leitao
2018-11-15  1:04   ` Michael Neuling
2018-11-06 12:40 ` [RFC PATCH 06/14] powerpc/tm: Do not recheckpoint at sigreturn Breno Leitao
2018-11-06 12:40 ` [RFC PATCH 07/14] powerpc/tm: Do not reclaim on ptrace Breno Leitao
2018-11-06 12:40 ` [RFC PATCH 08/14] powerpc/tm: Recheckpoint at exit path Breno Leitao
2018-11-15  2:45   ` Michael Neuling
2018-11-06 12:40 ` [RFC PATCH 09/14] powerpc/tm: Warn if state is transactional Breno Leitao
2018-11-15  2:48   ` Michael Neuling
2018-11-06 12:40 ` [RFC PATCH 10/14] powerpc/tm: Improve TM debug information Breno Leitao
2018-11-06 12:40 ` [RFC PATCH 11/14] powerpc/tm: Save MSR to PACA before RFID Breno Leitao
2018-11-06 12:40 ` [RFC PATCH 12/14] powerpc/tm: Restore transactional SPRs Breno Leitao
2018-11-06 12:40 ` [RFC PATCH 13/14] powerpc/tm: Do not restore TM without SPRs Breno Leitao
2018-11-15  3:02   ` Michael Neuling
2018-11-06 12:40 ` [RFC PATCH 14/14] selftests/powerpc: Adapt tm-syscall test to no suspend Breno Leitao
2018-11-06 18:32 ` [RFC PATCH v2 00/14] New TM Model Florian Weimer
2018-11-06 19:31   ` Breno Leitao
2018-11-07  0:39     ` Michael Neuling

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