From: Mark Brown <broonie@kernel.org>
To: Shengjiu Wang <shengjiu.wang@nxp.com>
Cc: shengjiu.wang@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com,
nicoleotsuka@gmail.com, lgirdwood@gmail.com, perex@perex.cz,
tiwai@suse.com, linux-sound@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/5] ASoC: fsl-asoc-card: add channel and rate constraints for CS42888
Date: Fri, 24 Apr 2026 17:09:32 +0100 [thread overview]
Message-ID: <c925e9e6-934d-4b07-aaef-a7f737c687a2@sirena.org.uk> (raw)
In-Reply-To: <20260424103806.2276780-4-shengjiu.wang@nxp.com>
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On Fri, Apr 24, 2026 at 06:38:04PM +0800, Shengjiu Wang wrote:
> The CS42888 codec has 4 I2S lanes with 2 channels per lane. Using odd
> channel counts (3, 5, 7) causes data misalignment in the I2S frame,
> resulting in incorrect channel mapping. Only mono and even channel
> counts (1, 2, 4, 6, 8) work correctly.
> +static int fsl_asoc_card_startup(struct snd_pcm_substream *substream)
> +{
> + struct snd_soc_pcm_runtime *rtd = substream->private_data;
> + struct fsl_asoc_card_priv *priv = snd_soc_card_get_drvdata(rtd->card);
> + struct snd_pcm_runtime *runtime = substream->runtime;
> + static struct snd_pcm_hw_constraint_list constraint_rates;
> + static struct snd_pcm_hw_constraint_list constraint_channels;
This makes the constraints global for all substreams, given that the
Freescale SoCs tend to have multiple DAIs and have things like direct
PDM inputs I'd expect it'd be relatively common to have disjoint
constraints.
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next prev parent reply other threads:[~2026-04-24 16:09 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-24 10:38 [PATCH 0/5] ASoC: fsl-asoc-card: Add some improvements Shengjiu Wang
2026-04-24 10:38 ` [PATCH 1/5] ASoC: fsl-asoc-card: enable dpcm_merged_chan flag for ASRC frontend Shengjiu Wang
2026-04-24 10:38 ` [PATCH 2/5] ASoC: fsl-asoc-card: enable ignore_pmdown_time for ASRC case Shengjiu Wang
2026-04-24 10:38 ` [PATCH 3/5] ASoC: fsl-asoc-card: add channel and rate constraints for CS42888 Shengjiu Wang
2026-04-24 16:09 ` Mark Brown [this message]
2026-04-27 10:47 ` Shengjiu Wang
2026-04-24 10:38 ` [PATCH 4/5] ASoC: fsl-asoc-card: exclude S20_3LE format due to clock limitations Shengjiu Wang
2026-04-24 10:38 ` [PATCH 5/5] ASoC: fsl-asoc-card: reduce WM8904 PLL ratio to meet frequency limit Shengjiu Wang
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