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From: Christophe Leroy <christophe.leroy@c-s.fr>
Subject: [PATCH RESEND v5 0/5] powerpc8xx: Further optimisation of TLB handling
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
 Paul Mackerras <paulus@samba.org>, Michael Ellerman <mpe@ellerman.id.au>,
 scottwood@freescale.com
Date: Mon, 20 Apr 2015 07:54:36 +0200 (CEST)
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
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This patchset provides a further optimisation of TLB handling in the 8xx.
Changes are:
- Not saving registers like CR when not needed
- Adding support to any TASK_SIZE

Only the last patch of the set is changed compared to v4

Resending with proper From: this time.

Christophe Leroy (5):
  powerpc/8xx: macro for handling CPU15 errata
  powerpc/8xx: Handle CR out of exception PROLOG/EPILOG
  powerpc/8xx: dont save CR in SCRATCH registers
  powerpc/8xx: Use SPRG2 instead of DAR for saving r3
  powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000

 arch/powerpc/kernel/head_8xx.S | 79 +++++++++++++++++++++++++++---------------
 1 file changed, 51 insertions(+), 28 deletions(-)

-- 
2.1.0