From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 00/10] Optimise TLB miss handlers on 6xx (603/e300)
Date: Thu, 21 Feb 2019 10:37:52 +0000 (UTC) [thread overview]
Message-ID: <cover.1550745320.git.christophe.leroy@c-s.fr> (raw)
The main purpose of this series is to optimise the handling of
TLB misses on the 603/e300.
Today the TLB miss handlers are implemented by more or less
copying the actions performed by the hash page handlers used
on processors having HASH pagetable.
This series brings some simplification.
It also improves TLB misses on all 6xx by storing the PGDIR phys address
in an SPRG instead of reading it from thread struct.
v2:
- Added a patch which frees SPRN_SPRG2 by saving RTAS entry stack pointer in
the thread struct, allowing to use it for storing the PGDIR for all 6xx.
- Now using SPRN_SPRG2 for storing the PGDIR instead of SPRN_SPRG5. This allows
the old 6xx having only 4 SPRGs to also get the benefit of this change.
- Removed the last patch of the series which was reordering the _PAGE_FLAGS bits
because it fails on hash 6xx. Will be re-added later once fixed.
Christophe Leroy (10):
powerpc: simplify BDI switch
powerpc/6xx: Don't use SPRN_SPRG2 for storing stack pointer while in
RTAS
powerpc/6xx: Store PGDIR physical address in a SPRG
powerpc/603: use physical address directly in TLB miss handlers.
powerpc/hash32: use physical address directly in hash handlers.
powerpc/603: Don't handle kernel page TLB misses when not need
powerpc/603: Don't handle _PAGE_RW and _PAGE_DIRTY on ITLB misses
powerpc/603: let's handle PAGE_DIRTY directly
powerpc/603: Don't worry about _PAGE_USER in TLB miss handlers
powerpc/603: don't handle PAGE_ACCESSED in TLB miss handlers.
arch/powerpc/include/asm/mmu.h | 2 +
arch/powerpc/include/asm/processor.h | 3 +
arch/powerpc/include/asm/reg.h | 2 +-
arch/powerpc/kernel/asm-offsets.c | 3 +
arch/powerpc/kernel/cpu_setup_6xx.S | 4 ++
arch/powerpc/kernel/entry_32.S | 5 +-
arch/powerpc/kernel/head_32.S | 111 ++++++++++++++++-------------------
arch/powerpc/kernel/head_40x.S | 5 +-
arch/powerpc/kernel/head_8xx.S | 1 +
arch/powerpc/mm/8xx_mmu.c | 7 +--
arch/powerpc/mm/hash_low_32.S | 65 +++++++++-----------
arch/powerpc/mm/ppc_mmu_32.c | 6 +-
12 files changed, 104 insertions(+), 110 deletions(-)
--
2.13.3
next reply other threads:[~2019-02-21 10:40 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-21 10:37 Christophe Leroy [this message]
2019-02-21 10:37 ` [PATCH v2 01/10] powerpc: simplify BDI switch Christophe Leroy
2019-02-22 9:48 ` [v2,01/10] " Michael Ellerman
2019-02-21 10:37 ` [PATCH v2 02/10] powerpc/6xx: Don't use SPRN_SPRG2 for storing stack pointer while in RTAS Christophe Leroy
2019-02-21 10:37 ` [PATCH v2 03/10] powerpc/6xx: Store PGDIR physical address in a SPRG Christophe Leroy
2019-03-07 14:11 ` Guenter Roeck
2019-03-07 18:14 ` Christophe Leroy
2019-03-07 19:07 ` Guenter Roeck
2019-03-07 19:10 ` Christophe Leroy
2019-02-21 10:37 ` [PATCH v2 04/10] powerpc/603: use physical address directly in TLB miss handlers Christophe Leroy
2019-02-21 10:37 ` [PATCH v2 05/10] powerpc/hash32: use physical address directly in hash handlers Christophe Leroy
2019-02-21 10:37 ` [PATCH v2 06/10] powerpc/603: Don't handle kernel page TLB misses when not need Christophe Leroy
2019-02-21 10:37 ` [PATCH v2 07/10] powerpc/603: Don't handle _PAGE_RW and _PAGE_DIRTY on ITLB misses Christophe Leroy
2019-02-21 10:38 ` [PATCH v2 08/10] powerpc/603: let's handle PAGE_DIRTY directly Christophe Leroy
2019-02-21 10:38 ` [PATCH v2 09/10] powerpc/603: Don't worry about _PAGE_USER in TLB miss handlers Christophe Leroy
2019-02-21 10:38 ` [PATCH v2 10/10] powerpc/603: don't handle PAGE_ACCESSED " Christophe Leroy
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