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Miller" , Geert Uytterhoeven , linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, linux-pci@vger.kernel.org, sparclinux@vger.kernel.org, Thomas Bogendoerfer , =?ISO-8859-15?Q?Christian_K=F6nig?= , Yinghai Lu , Igor Mammedov , "Rafael J . Wysocki" , Jonathan Cameron , Lorenzo Pieralisi , =?ISO-8859-2?Q?Krzysztof_Wilczy=F1ski?= , LKML , =?ISO-8859-2?Q?Micha=B3_Winiarski?= , linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH 00/24] PCI: Bridge window selection improvements In-Reply-To: <20250827223606.GA915856@bhelgaas> Message-ID: References: <20250827223606.GA915856@bhelgaas> X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Type: multipart/mixed; BOUNDARY="8323328-231680363-1756381945=:938" Content-ID: <11bc2533-54ae-273a-c46a-d271790c5a86@linux.intel.com> This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323328-231680363-1756381945=:938 Content-Type: text/plain; CHARSET=ISO-8859-15 Content-Transfer-Encoding: QUOTED-PRINTABLE Content-ID: On Wed, 27 Aug 2025, Bjorn Helgaas wrote: > On Fri, Aug 22, 2025 at 05:55:41PM +0300, Ilpo J=E4rvinen wrote: > > This series is based on top of the three resource fitting and > > assignment algorithm fixes (v3). > >=20 > > PCI resource fitting and assignment code needs to find the bridge > > window a resource belongs to in multiple places, yet, no common > > function for that exists. Thus, each site has its own version of > > the decision, each with their own corner cases, misbehaviors, and > > some resulting in complex interfaces between internal functions. > > ... >=20 > > I've tried to look out for any trouble that code under arch/ could > > cause after the flags start to behave differently and therefore ended > > up consolidating arch/ code to use pci_enable_resources(). My > > impression is that strictly speaking only the MIPS code would break > > similar to PCI core's copy of pci_enable_resources(), the others were > > much more lax in checking so they'd likely keep working but > > consolidation seemed still the best approach there as the enable checks > > seemed diverging for no apparent reason. > > ... >=20 > > m68k/PCI: Use pci_enable_resources() in pcibios_enable_device() > > sparc/PCI: Remove pcibios_enable_device() as they do nothing extra > > MIPS: PCI: Use pci_enable_resources() > > ... >=20 > > arch/m68k/kernel/pcibios.c | 39 +- > > arch/mips/pci/pci-legacy.c | 38 +- > > arch/sparc/kernel/leon_pci.c | 27 -- > > arch/sparc/kernel/pci.c | 27 -- > > arch/sparc/kernel/pcic.c | 27 -- > > ... >=20 > I love the fact that you're doing so much cleanup. Thanks for all the > work in this! > > Obviously all this code is quite sensitive, so I put it on > pci/resource to get more exposure in -next. Thanks. I really appreciate the opportunity to have it in next for extra=20 testing as my testing, while relatively extensive, still has its limits. I'll need to do minor corrections into a few intermediate patches though=20 to ensure bisectability, we really want to make this as bisectable as=20 possible. In other words, I've found 2 relatively small issues in them=20 which won't change the end result when the whole series is complete and=20 fixed some small grammar errors in the changelogs. I see you made some corrections so I'm not sure what's the best course of= =20 action here to update them. Should I just send v2 normally and you deal=20 with your changes while replacing v1 with v2? > If it turns out that we > trip over things or just don't feel comfortable yet for v6.18, we can > always defer this part until the next cycle. I agree, and really please don't hesitate to postpone if it turns out=20 necessary. > I will also watch for acks from the m68k, mips, and sparc maintainers > for those pieces. >=20 > Bjorn >=20 --=20 i. --8323328-231680363-1756381945=:938--