From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Nicholas Piggin <npiggin@gmail.com>, linuxppc-dev@lists.ozlabs.org
Cc: Scott Wood <oss@buserror.net>
Subject: Re: [PATCH 10/10] powerpc: move norestart trap flag to bit 0
Date: Tue, 16 Mar 2021 08:13:27 +0100 [thread overview]
Message-ID: <d359ad7b-8c4d-a699-4764-dee478cad110@csgroup.eu> (raw)
In-Reply-To: <1615878424.0gp943h7l3.astroid@bobo.none>
Le 16/03/2021 à 08:11, Nicholas Piggin a écrit :
> Excerpts from Christophe Leroy's message of March 15, 2021 6:14 pm:
>>
>>
>> Le 15/03/2021 à 04:17, Nicholas Piggin a écrit :
>>> Compact the trap flags down to use the low 4 bits of regs.trap.
>>>
>>> A few 64e interrupt trap numbers set bit 4. Although they tended to be
>>> trivial so it wasn't a real problem[1], it is not the right thing to do,
>>> and confusing.
>>>
>>> [*] E.g., 0x310 hypercall goes to unknown_exception, which prints
>>> regs->trap directly so 0x310 will appear fine, and only the syscall
>>> interrupt will test norestart, so it won't be confused by 0x310.
>>>
>>> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>>> ---
>>> arch/powerpc/include/asm/ptrace.h | 14 ++++++++++----
>>> 1 file changed, 10 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
>>> index 91194fdd5d01..6a04abfe5eb6 100644
>>> --- a/arch/powerpc/include/asm/ptrace.h
>>> +++ b/arch/powerpc/include/asm/ptrace.h
>>> @@ -185,15 +185,21 @@ static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
>>> #define current_pt_regs() \
>>> ((struct pt_regs *)((unsigned long)task_stack_page(current) + THREAD_SIZE) - 1)
>>>
>>> +/*
>>> + * The 4 low bits (0xf) are available as flags to overload the trap word,
>>> + * because interrupt vectors have minimum alignment of 0x10. TRAP_FLAGS_MASK
>>> + * must cover the bits used as flags, including bit 0 which is used as the
>>> + * "norestart" bit.
>>> + */
>>> #ifdef __powerpc64__
>>> -#define TRAP_FLAGS_MASK 0x10
>>> +#define TRAP_FLAGS_MASK 0x1
>>> #define TRAP(regs) ((regs)->trap & ~TRAP_FLAGS_MASK)
>>> #else
>>> /*
>>> * On 4xx we use bit 1 in the trap word to indicate whether the exception
>>> * is a critical exception (1 means it is).
>>> */
>>> -#define TRAP_FLAGS_MASK 0x1E
>>> +#define TRAP_FLAGS_MASK 0xf
>>
>> Could we set 0xf for all and remove the ifdef __powerpc64__ ?
>
> I like that it documents the bit number allocation so I prefer to leave
> it, but TRAP() does not have to be defined twice at least.
>
>>
>>> #define TRAP(regs) ((regs)->trap & ~TRAP_FLAGS_MASK)
>>> #define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
>>> #define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0)
>>> @@ -222,12 +228,12 @@ static inline bool trap_is_syscall(struct pt_regs *regs)
>>>
>>> static inline bool trap_norestart(struct pt_regs *regs)
>>> {
>>> - return regs->trap & 0x10;
>>> + return regs->trap & 0x1;
>>> }
>>>
>>> static inline void set_trap_norestart(struct pt_regs *regs)
>>> {
>>> - regs->trap |= 0x10;
>>> + regs->trap |= 0x1;
>>> }
>>>
>>> #define arch_has_single_step() (1)
>>>
>>
>> While we are playing with ->trap, in mm/book3s64/hash_utils.c there is an if (regs->trap == 0x400).
>> Should be TRAP(regs) == 0x400 ?
>
> Yes I would say so, if you want to do a patch you can add
> Acked-by: Nicholas Piggin <npiggin@gmail.com>
>
> Otherwise I can do it.
Yes please do.
Thanks
Christophe
next prev parent reply other threads:[~2021-03-16 7:14 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-15 3:17 [PATCH 00/10] Move 64e to new interrupt return code Nicholas Piggin
2021-03-15 3:17 ` [PATCH 01/10] powerpc/syscall: switch user_exit_irqoff and trace_hardirqs_off order Nicholas Piggin
2021-03-15 3:17 ` [PATCH 02/10] powerpc/64e/interrupt: always save nvgprs on interrupt Nicholas Piggin
2021-03-15 3:17 ` [PATCH 03/10] powerpc/64e/interrupt: use new interrupt return Nicholas Piggin
2021-03-15 7:50 ` Christophe Leroy
2021-03-15 8:20 ` Christophe Leroy
2021-03-16 7:03 ` Nicholas Piggin
2021-03-15 13:30 ` Christophe Leroy
2021-03-16 7:04 ` Nicholas Piggin
2021-03-16 7:25 ` Nicholas Piggin
2021-03-16 7:29 ` Christophe Leroy
2021-03-16 8:14 ` Nicholas Piggin
2021-03-15 3:17 ` [PATCH 04/10] powerpc/64e/interrupt: NMI save irq soft-mask state in C Nicholas Piggin
2021-03-15 3:17 ` [PATCH 05/10] powerpc/64e/interrupt: reconcile " Nicholas Piggin
2021-03-15 3:17 ` [PATCH 06/10] powerpc/64e/interrupt: Use new interrupt context tracking scheme Nicholas Piggin
2021-03-15 3:17 ` [PATCH 07/10] powerpc/64e/interrupt: handle bad_page_fault in C Nicholas Piggin
2021-03-15 14:07 ` Christophe Leroy
2021-03-16 7:06 ` Nicholas Piggin
2021-03-15 3:17 ` [PATCH 08/10] powerpc: clean up do_page_fault Nicholas Piggin
2021-03-15 3:17 ` [PATCH 09/10] powerpc: remove partial register save logic Nicholas Piggin
2021-03-15 3:17 ` [PATCH 10/10] powerpc: move norestart trap flag to bit 0 Nicholas Piggin
2021-03-15 8:14 ` Christophe Leroy
2021-03-16 7:11 ` Nicholas Piggin
2021-03-16 7:13 ` Christophe Leroy [this message]
2021-03-22 23:45 ` [PATCH 00/10] Move 64e to new interrupt return code Daniel Axtens
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