MPC85xx DMA support for Kernel 2.6?

MPC85xx DMA support for Kernel 2.6?

[Clemens Koller]

Hello!

I am planning to use DMA/burst access for copying large chunks of data
(100MBytes) from the Local Bus (UPM accessed SRAM) to System Memory (DDR)
as fast as possible (200MBytes/s). (As you can guess, that's a framegrabber).

As far as I have seen, the DMA engines of the MPC85xx (fsl-dma) are not
supported in the classical way (dma_request(), free_dma()) in the kernel 2.6.x.
The memory allocators in arch/ppc/dma-mapping.c seem to be usable,
but there is no valuable dma support yet (true?).

I can program the DMA Controllers in my MPC8540 on my own to achieve what I want
but it would be great to get/produce/stick with as much cross-platform reusable
code as possible.

Is there any ongoing work to put DMA support for the mpc85xx and similar
devices into the kernel? Is there any ongoing work in this area
or is somebody working with the fsl-dma and can publish some code and
share some ideas?

Best greets,

Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany

http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19

Re: MPC85xx DMA support for Kernel 2.6?

[Kumar Gala]

On Jun 30, 2005, at 10:12 AM, Clemens Koller wrote:

> Hello!
>
> I am planning to use DMA/burst access for copying large chunks of data
> (100MBytes) from the Local Bus (UPM accessed SRAM) to System Memory  
> (DDR)
> as fast as possible (200MBytes/s). (As you can guess, that's a  
> framegrabber).
>
> As far as I have seen, the DMA engines of the MPC85xx (fsl-dma) are  
> not
> supported in the classical way (dma_request(), free_dma()) in the  
> kernel 2.6.x.
> The memory allocators in arch/ppc/dma-mapping.c seem to be usable,
> but there is no valuable dma support yet (true?).
>
> I can program the DMA Controllers in my MPC8540 on my own to  
> achieve what I want
> but it would be great to get/produce/stick with as much cross- 
> platform reusable
> code as possible.
>
> Is there any ongoing work to put DMA support for the mpc85xx and  
> similar
> devices into the kernel? Is there any ongoing work in this area
> or is somebody working with the fsl-dma and can publish some code and
> share some ideas?

I'm not aware of anyone work on such a thing.  I'd be more than happy  
to accept patches for it.  I know several of us have written some  
APIs on top of the DMA for 85xx.  Those however are non-standard APIs.

What APIs exist for general purpose DMA engines?  Last time I looked  
at this problem nothing really existed.

- kumar

Re: MPC85xx DMA support for Kernel 2.6?

[Clemens Koller]

Hi, Kumar...

> I'm not aware of anyone work on such a thing.

*Sigh*... no holiday for me this summer .-(

> I'd be more than happy  
> to accept patches for it.  I know several of us have written some  APIs 
> on top of the DMA for 85xx.  Those however are non-standard APIs.

But is there any code available for recycling?
Are there any Freescale-FAE's with some snippets?
(Hello, world!)
I am about to start more or less from scratch and re-invent the wheel.

> What APIs exist for general purpose DMA engines?  Last time I looked  at 
> this problem nothing really existed.

:-) I was wondering about that, too...
Maybe we can get some basics from this one:
Linux/Documentation/DMA-API.txt

And, well, code from:
asm-ppc/ppc4xx_dma.h
arch/ppc/syslib/ppc4xx_sgdma.c
and from the pci.h subsystem.

Hmm... and there is the factor that it's difficult to get
resources in my project for all that. :-(((

Best greets,

Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany

http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19

Re: MPC85xx DMA support for Kernel 2.6?

[Murray.Jensen]

On Thu, 30 Jun 2005 17:56:30 +0200, Clemens Koller writes:
>But is there any code available for recycling?

Jason McMullan has some code for mpc85xx dma here:

	http://www.evillabs.net/~gus/patches/mpc85xx_dma.patch

Looks like it wouldn't take much to get it working. Cheers!
								Murray...
--
Murray Jensen, CSIRO Manufacturing & Infra. Tech.      Phone: +61 3 9662 7763
Locked Bag No. 9, Preston, Vic, 3072, Australia.         Fax: +61 3 9662 7853
Internet: Murray.Jensen@csiro.au

To the extent permitted by law, CSIRO does not represent, warrant and/or
guarantee that the integrity of this communication has been maintained or
that the communication is free of errors, virus, interception or interference.

The information contained in this e-mail may be confidential or privileged.
Any unauthorised use or disclosure is prohibited. If you have received this
e-mail in error, please delete it immediately and notify Murray Jensen on
+61 3 9662 7763. Thank you.

Re: MPC85xx DMA support for Kernel 2.6?

[Dan Malek]

On Jun 30, 2005, at 11:56 AM, Clemens Koller wrote:

> *Sigh*... no holiday for me this summer .-(

Before you start, just make sure such a thing is really a performance
enhancement.  Yes, the DMA does run in parallel with the core, but often
the overhead of the set up and clean up interrupt is more code and time
that if you just copied the data in a loop.  If possible, integrate the 
DMA
processing into other driver work, clean up a previous DMA the next time
the driver needs to use it, not with a separate completion handler.

Thanks.

	-- Dan

Re: MPC85xx DMA support for Kernel 2.6?

[Clemens Koller]

Hi, Dan!

Dan Malek wrote:
> Before you start, just make sure such a thing is really a performance
> enhancement.  Yes, the DMA does run in parallel with the core, but often
> the overhead of the set up and clean up interrupt is more code and time
> that if you just copied the data in a loop.  If possible, integrate the DMA
> processing into other driver work, clean up a previous DMA the next time
> the driver needs to use it, not with a separate completion handler.

Well... thanks. But the CPU is intended to do image processing while
data comes in. And currently, when I access (memcopy) the SRAM on my
Local Bus via UPM I cannot get it to generate bursts yet, so I hope the
DMA will speed up those things, too.

Greets,

Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany

http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19

Re: MPC85xx DMA support for Kernel 2.6?

[Clemens Koller]

Hi, Murray!
Hello, Jason!

Thank you very much! It seems like you saved my holiday! :-)))
I will have a look and see what I can find there.
Is there any interest to publish this and the other patches
and get it into 2.6 if not already planned?

Best regards,

Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany

http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19

Murray.Jensen@csiro.au wrote:
> On Thu, 30 Jun 2005 17:56:30 +0200, Clemens Koller writes:
> 
>>But is there any code available for recycling?
> 
> 
> Jason McMullan has some code for mpc85xx dma here:
> 
> 	http://www.evillabs.net/~gus/patches/mpc85xx_dma.patch
> 
> Looks like it wouldn't take much to get it working. Cheers!
> 								Murray...
> --
> Murray Jensen, CSIRO Manufacturing & Infra. Tech.      Phone: +61 3 9662 7763
> Locked Bag No. 9, Preston, Vic, 3072, Australia.         Fax: +61 3 9662 7853
> Internet: Murray.Jensen@csiro.au
> 
> To the extent permitted by law, CSIRO does not represent, warrant and/or
> guarantee that the integrity of this communication has been maintained or
> that the communication is free of errors, virus, interception or interference.
> 
> The information contained in this e-mail may be confidential or privileged.
> Any unauthorised use or disclosure is prohibited. If you have received this
> e-mail in error, please delete it immediately and notify Murray Jensen on
> +61 3 9662 7763. Thank you.
> 

Re: MPC85xx DMA support for Kernel 2.6?

[Murray.Jensen]

On Fri, 01 Jul 2005 09:54:44 +0200, Clemens Koller writes:
>Is there any interest to publish this and the other patches
>and get it into 2.6 if not already planned?

Well, I'd certainly be interested. Cheers!
								Murray...
-- 
Murray Jensen, CSIRO Manufacturing & Infra. Tech.      Phone: +61 3 9662 7763
Locked Bag No. 9, Preston, Vic, 3072, Australia.         Fax: +61 3 9662 7853
Internet: Murray.Jensen@csiro.au

To the extent permitted by law, CSIRO does not represent, warrant and/or
guarantee that the integrity of this communication has been maintained or
that the communication is free of errors, virus, interception or interference.

The information contained in this e-mail may be confidential or privileged.
Any unauthorised use or disclosure is prohibited. If you have received this
e-mail in error, please delete it immediately and notify Murray Jensen on
+61 3 9662 7763. Thank you.

Re: MPC85xx DMA support for Kernel 2.6?

[Kumar Gala]

Well, this goes back to my comment on there not being a set of  
generic kernel APIs for general purpose DMA engines.

Otherwise, I'd rather leave this out of the kernel proper.

- kumar

On Jul 1, 2005, at 3:36 AM, <Murray.Jensen@csiro.au> wrote:

> On Fri, 01 Jul 2005 09:54:44 +0200, Clemens Koller writes:
>
>> Is there any interest to publish this and the other patches
>> and get it into 2.6 if not already planned?
>>
>
> Well, I'd certainly be interested. Cheers!
>
> Murray...
> -- 
> Murray Jensen, CSIRO Manufacturing & Infra. Tech.      Phone: +61 3  
> 9662
> 7763
> Locked Bag No. 9, Preston, Vic, 3072, Australia.         Fax: +61 3  
> 9662
> 7853
> Internet: Murray.Jensen@csiro.au
>
> To the extent permitted by law, CSIRO does not represent, warrant  
> and/or
> guarantee that the integrity of this communication has been maintained
> or
> that the communication is free of errors, virus, interception or
> interference.
>
> The information contained in this e-mail may be confidential or
> privileged.
> Any unauthorised use or disclosure is prohibited. If you have received
> this
> e-mail in error, please delete it immediately and notify Murray Jensen
> on
> +61 3 9662 7763. Thank you.
>
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>

Re: MPC85xx DMA support for Kernel 2.6?

[Dan Malek]

On Jul 1, 2005, at 3:47 AM, Clemens Koller wrote:

> .... And currently, when I access (memcopy) the SRAM on my
> Local Bus via UPM I cannot get it to generate bursts yet, so I hope the
> DMA will speed up those things, too.

If the CPU won't do it, the DMA won't either.  You better get that
UPM working first :-)


	-- Dan

Re: MPC85xx DMA support for Kernel 2.6?

[Mark Chambers]

> 
> On Jul 1, 2005, at 3:47 AM, Clemens Koller wrote:
> 
> > .... And currently, when I access (memcopy) the SRAM on my
> > Local Bus via UPM I cannot get it to generate bursts yet, so I hope the
> > DMA will speed up those things, too.
> 
> If the CPU won't do it, the DMA won't either.  You better get that
> UPM working first :-)
> 
> 
> -- Dan
> 

Is the SRAM being cached?  I don't think the CPU will generate bursts
unless it's cached, right?

Mark Chambers

Re: MPC85xx DMA support for Kernel 2.6?

[Dan Malek]

On Jul 1, 2005, at 10:15 AM, Mark Chambers wrote:

> Is the SRAM being cached?  I don't think the CPU will generate bursts
> unless it's cached, right?

I don't really remember :-)  I know the 8xx will not burst if the line 
isn't
cached, and I know the 7xxx will.  I thought the 82xx and 85xx would
also burst if you had sufficient sequential operations queued.  On
83/85xx you have to further qualify the discussion based upon the DDR2
or the local bus interface :-)  The CPM and DMA will burst on all
buses for 8xx/82xx/83xx/85xx if the memory controller is configured
to do so.

I always end up writing code to test it, then those brain cells get
replaced by more meaningful experiences before I have to use
them again :-)

Thanks.


	-- Dan

Re: MPC85xx DMA support for Kernel 2.6?

[Clemens Koller]

Hi, Dan and Mark!

Dan Malek wrote:
> On Jul 1, 2005, at 10:15 AM, Mark Chambers wrote:
> 
>> Is the SRAM being cached?  I don't think the CPU will generate bursts
>> unless it's cached, right?
> 
> I don't really remember :-)  I know the 8xx will not burst if the line 
> isn't
> cached, and I know the 7xxx will.  I thought the 82xx and 85xx would
> also burst if you had sufficient sequential operations queued.  On
> 83/85xx you have to further qualify the discussion based upon the DDR2
> or the local bus interface :-)  The CPM and DMA will burst on all
> buses for 8xx/82xx/83xx/85xx if the memory controller is configured
> to do so.

Thanks, for your comments! I'll have a look at it during the
next days and let you know about my mileage :-)

Greets,

Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany

http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19