linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] ASoC: fsl_xcvr: refine the requested phy clock frequency
@ 2023-11-23  1:14 Shengjiu Wang
  2023-11-23  9:06 ` Iuliana Prodan
  2023-11-23 17:00 ` Mark Brown
  0 siblings, 2 replies; 3+ messages in thread
From: Shengjiu Wang @ 2023-11-23  1:14 UTC (permalink / raw)
  To: nicoleotsuka, Xiubo.Lee, festevam, shengjiu.wang, lgirdwood,
	broonie, perex, tiwai, alsa-devel
  Cc: linuxppc-dev, linux-kernel

As the input phy clock frequency will divided by 2 by default
on i.MX8MP with the implementation of clk-imx8mp-audiomix driver,
So the requested frequency need to be updated.

The relation of phy clock is:
    sai_pll_ref_sel
       sai_pll
          sai_pll_bypass
             sai_pll_out
                sai_pll_out_div2
                   earc_phy_cg

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
 sound/soc/fsl/fsl_xcvr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/soc/fsl/fsl_xcvr.c b/sound/soc/fsl/fsl_xcvr.c
index 77f8e2394bf9..f0fb33d719c2 100644
--- a/sound/soc/fsl/fsl_xcvr.c
+++ b/sound/soc/fsl/fsl_xcvr.c
@@ -358,7 +358,7 @@ static int fsl_xcvr_en_aud_pll(struct fsl_xcvr *xcvr, u32 freq)
 	struct device *dev = &xcvr->pdev->dev;
 	int ret;
 
-	freq = xcvr->soc_data->spdif_only ? freq / 10 : freq;
+	freq = xcvr->soc_data->spdif_only ? freq / 5 : freq;
 	clk_disable_unprepare(xcvr->phy_clk);
 	ret = clk_set_rate(xcvr->phy_clk, freq);
 	if (ret < 0) {
@@ -409,7 +409,7 @@ static int fsl_xcvr_prepare(struct snd_pcm_substream *substream,
 	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 	u32 m_ctl = 0, v_ctl = 0;
 	u32 r = substream->runtime->rate, ch = substream->runtime->channels;
-	u32 fout = 32 * r * ch * 10 * 2;
+	u32 fout = 32 * r * ch * 10;
 	int ret = 0;
 
 	switch (xcvr->mode) {
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] ASoC: fsl_xcvr: refine the requested phy clock frequency
  2023-11-23  1:14 [PATCH] ASoC: fsl_xcvr: refine the requested phy clock frequency Shengjiu Wang
@ 2023-11-23  9:06 ` Iuliana Prodan
  2023-11-23 17:00 ` Mark Brown
  1 sibling, 0 replies; 3+ messages in thread
From: Iuliana Prodan @ 2023-11-23  9:06 UTC (permalink / raw)
  To: Shengjiu Wang, nicoleotsuka, Xiubo.Lee, festevam, shengjiu.wang,
	lgirdwood, broonie, perex, tiwai, alsa-devel
  Cc: linuxppc-dev, linux-kernel

On 11/23/2023 3:14 AM, Shengjiu Wang wrote:
> As the input phy clock frequency will divided by 2 by default
> on i.MX8MP with the implementation of clk-imx8mp-audiomix driver,
> So the requested frequency need to be updated.
>
> The relation of phy clock is:
>      sai_pll_ref_sel
>         sai_pll
>            sai_pll_bypass
>               sai_pll_out
>                  sai_pll_out_div2
>                     earc_phy_cg
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>

Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>

Thanks,
Iulia

> ---
>   sound/soc/fsl/fsl_xcvr.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/sound/soc/fsl/fsl_xcvr.c b/sound/soc/fsl/fsl_xcvr.c
> index 77f8e2394bf9..f0fb33d719c2 100644
> --- a/sound/soc/fsl/fsl_xcvr.c
> +++ b/sound/soc/fsl/fsl_xcvr.c
> @@ -358,7 +358,7 @@ static int fsl_xcvr_en_aud_pll(struct fsl_xcvr *xcvr, u32 freq)
>   	struct device *dev = &xcvr->pdev->dev;
>   	int ret;
>   
> -	freq = xcvr->soc_data->spdif_only ? freq / 10 : freq;
> +	freq = xcvr->soc_data->spdif_only ? freq / 5 : freq;
>   	clk_disable_unprepare(xcvr->phy_clk);
>   	ret = clk_set_rate(xcvr->phy_clk, freq);
>   	if (ret < 0) {
> @@ -409,7 +409,7 @@ static int fsl_xcvr_prepare(struct snd_pcm_substream *substream,
>   	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
>   	u32 m_ctl = 0, v_ctl = 0;
>   	u32 r = substream->runtime->rate, ch = substream->runtime->channels;
> -	u32 fout = 32 * r * ch * 10 * 2;
> +	u32 fout = 32 * r * ch * 10;
>   	int ret = 0;
>   
>   	switch (xcvr->mode) {

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] ASoC: fsl_xcvr: refine the requested phy clock frequency
  2023-11-23  1:14 [PATCH] ASoC: fsl_xcvr: refine the requested phy clock frequency Shengjiu Wang
  2023-11-23  9:06 ` Iuliana Prodan
@ 2023-11-23 17:00 ` Mark Brown
  1 sibling, 0 replies; 3+ messages in thread
From: Mark Brown @ 2023-11-23 17:00 UTC (permalink / raw)
  To: nicoleotsuka, Xiubo.Lee, festevam, shengjiu.wang, lgirdwood,
	perex, tiwai, alsa-devel, Shengjiu Wang
  Cc: linuxppc-dev, linux-kernel

On Thu, 23 Nov 2023 09:14:53 +0800, Shengjiu Wang wrote:
> As the input phy clock frequency will divided by 2 by default
> on i.MX8MP with the implementation of clk-imx8mp-audiomix driver,
> So the requested frequency need to be updated.
> 
> The relation of phy clock is:
>     sai_pll_ref_sel
>        sai_pll
>           sai_pll_bypass
>              sai_pll_out
>                 sai_pll_out_div2
>                    earc_phy_cg
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/1] ASoC: fsl_xcvr: refine the requested phy clock frequency
      commit: 347ecf29a68cc8958fbcbd26ef410d07fe9d82f4

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2023-11-23 17:01 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-11-23  1:14 [PATCH] ASoC: fsl_xcvr: refine the requested phy clock frequency Shengjiu Wang
2023-11-23  9:06 ` Iuliana Prodan
2023-11-23 17:00 ` Mark Brown

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).