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To: Nicholas Piggin , mpe@ellerman.id.au, paulus@samba.org References: <20190514060205.20887-1-aneesh.kumar@linux.ibm.com> <1557982690.pk1t7llmyy.astroid@bobo.none> From: "Aneesh Kumar K.V" Date: Thu, 16 May 2019 19:06:43 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <1557982690.pk1t7llmyy.astroid@bobo.none> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 19051613-0072-0000-0000-0000042E6DF2 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011105; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000285; SDB=6.01204156; UDB=6.00632118; IPR=6.00985086; MB=3.00026918; MTD=3.00000008; XFM=3.00000015; UTC=2019-05-16 13:36:48 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19051613-0073-0000-0000-00004C3EA8B0 Message-Id: X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-16_11:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=896 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905160091 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 5/16/19 10:34 AM, Nicholas Piggin wrote: > Aneesh Kumar K.V's on May 14, 2019 4:02 pm: >> Avoids confusion when printing Oops message like below >> >> Faulting instruction address: 0xc00000000008bdb4 >> Oops: Kernel access of bad area, sig: 11 [#1] >> LE PAGE_SIZE=64K MMU=Radix MMU=Hash SMP NR_CPUS=2048 NUMA PowerNV >> >> Either ibm,pa-features or ibm,powerpc-cpu-features can be used to enable the >> MMU features. We don't clear related MMU feature bits there. We use the kernel >> commandline to determine what translation mode we want to use and clear the >> HPTE or radix bit accordingly. On LPAR we do have to renable HASH bit if the >> hypervisor can't do radix. > > Well we have the HPTE feature: the CPU supports hash MMU mode. It's > just the the kernel is booted in radix mode. > We are not using mmu_features to indicate the capability of the hardware right? ie, mmu_features is an indication of current running config. We set MMU_FTR_TYPE_RADIX if the kernel is running in radix translation mode and on similar lines we should set MMU_FTR_HPTE_TABLE if the kernel is running in only hash translation mode. Whether the hardware support these translation mode is different from which mode is currently used. > Could make a difference for KVM, if it will support an HPT guest or > not. > kvm should not depend on MMU_FTR_HPTE_TABLE to identify whether the hardware supports hash page table translation. I don't think we do that. > That's all highly theoretical and we have other inconsistencies > already in this stuff, I'd just like to try make things a bit better > in the long term. > -aneesh