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Tue, 28 Apr 2026 11:23:49 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 25E5F40562; Tue, 28 Apr 2026 11:30:17 +0800 (CST) Received: from [10.67.109.254] (10.67.109.254) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 28 Apr 2026 11:30:14 +0800 Message-ID: Date: Tue, 28 Apr 2026 11:30:13 +0800 X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v12 00/15] arm64/riscv: Add support for crashkernel CMA reservation To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , References: <20260402072701.628293-1-ruanjinjie@huawei.com> From: Jinjie Ruan In-Reply-To: <20260402072701.628293-1-ruanjinjie@huawei.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.109.254] X-ClientProxiedBy: kwepems100001.china.huawei.com (7.221.188.238) To dggpemf500011.china.huawei.com (7.185.36.131) On 4/2/2026 3:26 PM, Jinjie Ruan wrote: > The crash memory allocation, and the exclude of crashk_res, crashk_low_res > and crashk_cma memory are almost identical across different architectures, > This patch set handle them in crash core in a general way, which eliminate > a lot of duplication code. > > And add support for crashkernel CMA reservation for arm64 and riscv. > > Rebased on v7.0-rc1. > > Basic second kernel boot test were performed on QEMU platforms for x86, > ARM64, and RISC-V architectures with the following parameters: > > "cma=256M crashkernel=256M crashkernel=64M,cma" > > Changes in v12: > - Remove the unused "nr_mem_ranges" for x86. > - Add "Fix crashk_low_res not exclude bug" test log. > - Provide a separate patch for each architecture for using > crash_prepare_headers(), which will make the review more convenient. > - Add Reviewed-by and Tested-by. > - Link to v11: https://lore.kernel.org/all/20260328074013.3589544-1-ruanjinjie@huawei.com/ > > Changes in v11: > - Avoid silently drop crash memory if the crash kernel is built without > CONFIG_CMA. > - Remove unnecessary "cmem->nr_ranges = 0" for arch_crash_populate_cmem() > as we use kvzalloc(). > - Provide a separate patch for each architecture to fix the existing > buffer overflow issue. > - Add Acked-bys for arm64. > > Changes in v10: > - Fix crashk_low_res not excluded bug in the existing > RISC-V code. > - Fix an existing memory leak issue in the existing PowerPC code. > - Fix the ordering issue of adding CMA ranges to > "linux,usable-memory-range". > - Fix an existing concurrency issue. A Concurrent memory hotplug may occur > between reading memblock and attempting to fill cmem during kexec_load() > for almost all existing architectures. > - Link to v9: https://lore.kernel.org/all/20260323072745.2481719-1-ruanjinjie@huawei.com/ > > Changes in v9: > - Collect Reviewed-by and Acked-by, and prepare for Sashiko AI review. > - Link to v8: https://lore.kernel.org/all/20260302035315.3892241-1-ruanjinjie@huawei.com/ > > Changes in v8: > - Fix the build issues reported by kernel test robot and Sourabh. > - Link to v7: https://lore.kernel.org/all/20260226130437.1867658-1-ruanjinjie@huawei.com/ > > Changes in v7: > - Correct the inclusion of CMA-reserved ranges for kdump kernel in of/kexec > for arm64 and riscv. > - Add Acked-by. > - Link to v6: https://lore.kernel.org/all/20260224085342.387996-1-ruanjinjie@huawei.com/ > > Changes in v6: > - Update the crash core exclude code as Mike suggested. > - Rebased on v7.0-rc1. > - Add acked-by. > - Link to v5: https://lore.kernel.org/all/20260212101001.343158-1-ruanjinjie@huawei.com/ > > Jinjie Ruan (14): > riscv: kexec_file: Fix crashk_low_res not exclude bug > powerpc/crash: Fix possible memory leak in update_crash_elfcorehdr() > x86/kexec: Fix potential buffer overflow in prepare_elf_headers() > arm64: kexec_file: Fix potential buffer overflow in > prepare_elf_headers() > riscv: kexec_file: Fix potential buffer overflow in > prepare_elf_headers() > LoongArch: kexec: Fix potential buffer overflow in > prepare_elf_headers() > crash: Add crash_prepare_headers() to exclude crash kernel memory > arm64: kexec_file: Use crash_prepare_headers() helper to simplify code > x86/kexec: Use crash_prepare_headers() helper to simplify code > riscv: kexec_file: Use crash_prepare_headers() helper to simplify code > LoongArch: kexec: Use crash_prepare_headers() helper to simplify code > crash: Use crash_exclude_core_ranges() on powerpc > arm64: kexec: Add support for crashkernel CMA reservation > riscv: kexec: Add support for crashkernel CMA reservation Hi, every one, It seems the patches for crash core rework, powerpc, riscv, and arm64 are mostly ready to be merged. Could any maintainer help pick these up, or should I rebase the entire series against v7.1-rc1? > > Sourabh Jain (1): > powerpc/crash: sort crash memory ranges before preparing elfcorehdr > > .../admin-guide/kernel-parameters.txt | 16 +-- > arch/arm64/kernel/machine_kexec_file.c | 43 +++----- > arch/arm64/mm/init.c | 5 +- > arch/loongarch/kernel/machine_kexec_file.c | 43 +++----- > arch/powerpc/include/asm/kexec_ranges.h | 1 - > arch/powerpc/kexec/crash.c | 7 +- > arch/powerpc/kexec/ranges.c | 101 +----------------- > arch/riscv/kernel/machine_kexec_file.c | 42 +++----- > arch/riscv/mm/init.c | 5 +- > arch/x86/kernel/crash.c | 92 +++------------- > drivers/of/fdt.c | 9 +- > drivers/of/kexec.c | 9 ++ > include/linux/crash_core.h | 9 ++ > include/linux/crash_reserve.h | 4 +- > kernel/crash_core.c | 89 ++++++++++++++- > 15 files changed, 193 insertions(+), 282 deletions(-) >