From: Christian Zigotzky <chzigotzky@xenosoft.de>
To: Sean Anderson <sean.anderson@linux.dev>,
Michael Walle <mwalle@kernel.org>,
Madalin Bucur <madalin.bucur@nxp.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Christian Zigotzky <info@xenosoft.de>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, "R.T.Dickinson" <rtd2@xtra.co.nz>,
mad skateman <madskateman@gmail.com>,
Damien Stewart <hypexed@yahoo.com.au>
Subject: [PATCH net v3] net: dpaa: fix mode setting
Date: Sun, 19 Jul 2026 13:58:37 +0200 [thread overview]
Message-ID: <e2e75972-13d0-1a5c-23ab-c44913806437@xenosoft.de> (raw)
In-Reply-To: <095e561e-1e36-9ea1-b0c6-958c825851cb@xenosoft.de>
On 18/07/26 18:31, Christian Zigotzky wrote:
> On 17/07/26 23:10, Sean Anderson wrote:
>> On 7/17/26 09:20, Michael Walle wrote:
>>> Before converting to the phylink interface, the init function would
>>> have
>>> set a non-reserved I/F mode in the maccfg2 register. After
>>> converting to
>>> phylink, 0 is written as mode, which is a reserved value (although it's
>>> the hardware default). Without a valid mode, a SGMII link is never
>>> established between the MAC and the PHY and thus .link_up() is never
>>> called which could set the correct mode according to the actual speed.
>>>
>>> Fix it by setting the maximum speed of the phy_interface_t in use in
>>> .mac_config() - just like the driver did before the phylink conversion.
>>>
>>> Fixes: 5d93cfcf7360 ("net: dpaa: Convert to phylink")
>>> Suggested-by: Sean Anderson <sean.anderson@linux.dev>
>>> Signed-off-by: Michael Walle <mwalle@kernel.org>
>>> ---
>>> I didn't grab Sean's Rb tag as this is somewhat different.
>>>
>>> Changes in v3:
>>> - keep the mode setting also in .adjust_link().
>>> - reword the commit message, to be (hopefully) more precise
>>> - Link to v2:
>>> https://lore.kernel.org/r/20260710143430.2276141-1-mwalle@kernel.org/
>>>
>>> Changes in v2:
>>> - the setting is/was based on the maximum speed, not the current
>>> speed. thus, move the setting into mac_config().
>>> - Link to v1:
>>> https://lore.kernel.org/r/20260706121011.1948906-1-mwalle@kernel.org/
>>>
>>> .../net/ethernet/freescale/fman/fman_dtsec.c | 17
>>> ++++++++++++-----
>>> 1 file changed, 12 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
>>> b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
>>> index fe35703c509e..b8d70c0ecb6c 100644
>>> --- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c
>>> +++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c
>>> @@ -900,22 +900,28 @@ static void dtsec_mac_config(struct
>>> phylink_config *config, unsigned int mode,
>>> {
>>> struct mac_device *mac_dev = fman_config_to_mac(config);
>>> struct dtsec_regs __iomem *regs = mac_dev->fman_mac->regs;
>>> - u32 tmp;
>>> + u32 ecntrl, maccfg2;
>>> +
>>> + maccfg2 = ioread32be(®s->maccfg2);
>>> + maccfg2 &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE);
>>> switch (state->interface) {
>>> case PHY_INTERFACE_MODE_RMII:
>>> - tmp = DTSEC_ECNTRL_RMM;
>>> + ecntrl = DTSEC_ECNTRL_RMM;
>>> + maccfg2 |= MACCFG2_NIBBLE_MODE;
>>> break;
>>> case PHY_INTERFACE_MODE_RGMII:
>>> case PHY_INTERFACE_MODE_RGMII_ID:
>>> case PHY_INTERFACE_MODE_RGMII_RXID:
>>> case PHY_INTERFACE_MODE_RGMII_TXID:
>>> - tmp = DTSEC_ECNTRL_GMIIM | DTSEC_ECNTRL_RPM;
>>> + ecntrl = DTSEC_ECNTRL_GMIIM | DTSEC_ECNTRL_RPM;
>>> + maccfg2 |= MACCFG2_BYTE_MODE;
>>> break;
>>> case PHY_INTERFACE_MODE_SGMII:
>>> case PHY_INTERFACE_MODE_1000BASEX:
>>> case PHY_INTERFACE_MODE_2500BASEX:
>>> - tmp = DTSEC_ECNTRL_TBIM | DTSEC_ECNTRL_SGMIIM;
>>> + ecntrl = DTSEC_ECNTRL_TBIM | DTSEC_ECNTRL_SGMIIM;
>>> + maccfg2 |= MACCFG2_BYTE_MODE;
>>> break;
>>> default:
>>> dev_warn(mac_dev->dev, "cannot configure dTSEC for %s\n",
>>> @@ -923,7 +929,8 @@ static void dtsec_mac_config(struct
>>> phylink_config *config, unsigned int mode,
>>> return;
>>> }
>>> - iowrite32be(tmp, ®s->ecntrl);
>>> + iowrite32be(ecntrl, ®s->ecntrl);
>>> + iowrite32be(maccfg2, ®s->maccfg2);
>>> }
>>> static void dtsec_link_up(struct phylink_config *config, struct
>>> phy_device *phy,
>>
>> Reviewed-by: Sean Anderson <sean.anderson@linux.dev>
>>
>> Christian, can you test this patch with ethernet at 100/1G speed if
>> you still have
>> access to those P5020/P5040 boards?
>>
>> https://lore.kernel.org/all/0bfc8f3d-cb62-25f4-2590-ff424adbe48a@xenosoft.de/
>>
> I tested the patch today. I don't see any differences.
>
> Further information:
> https://github.com/chzigotzky/kernels/releases/tag/v7.2.0-rc3-fman-dtsec-patch
>
> Christian
>
I tested further the new patch today and switching between 100Mbit/s and
1Gbit/s works without any problems.
[ 1692.006428] fsl_dpaa_mac ffe4e8000.ethernet eth0: PHY
[mdio@ffe4e1120:03] driver [Micrel KSZ9021 Gigabit PHY] (irq=POLL)
[ 1692.006448] fsl_dpaa_mac ffe4e8000.ethernet eth0: configuring for
phy/rgmii link mode
[ 1692.021436] fsl_dpaa_mac ffe5e8000.ethernet eth2: PHY
[mdio@ffe4e1120:07] driver [Micrel KSZ9021 Gigabit PHY] (irq=POLL)
[ 1692.021456] fsl_dpaa_mac ffe5e8000.ethernet eth2: configuring for
phy/rgmii link mode
[ 1695.057699] fsl_dpaa_mac ffe4e8000.ethernet eth0: Link is Up -
1Gbps/Full - flow control rx/tx
[ 2148.681140] fsl_dpaa_mac ffe4e8000.ethernet eth0: Link is Down
[ 2149.704534] fsl_dpaa_mac ffe4e8000.ethernet eth0: Link is Up -
100Mbps/Full - flow control rx/tx
[ 2199.875179] fsl_dpaa_mac ffe4e8000.ethernet eth0: Link is Down
[ 2201.923103] fsl_dpaa_mac ffe4e8000.ethernet eth0: Link is Up -
1Gbps/Full - flow control rx/tx
- Christian
--
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prev parent reply other threads:[~2026-07-19 11:59 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20260717132401.2653252-1-mwalle@kernel.org>
2026-07-17 21:10 ` [PATCH net v3] net: dpaa: fix mode setting Sean Anderson
2026-07-18 7:35 ` Christian Zigotzky
2026-07-18 16:31 ` Christian Zigotzky
2026-07-19 11:58 ` Christian Zigotzky [this message]
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