From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Rohan McLure <rmclure@linux.ibm.com>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>
Cc: Nicholas Piggin <npiggin@gmail.com>
Subject: Re: [PATCH v2 1/4] powerpc/64: Add INTERRUPT_SANITIZE_REGISTERS Kconfig
Date: Mon, 7 Nov 2022 14:28:56 +0000 [thread overview]
Message-ID: <e436f57a-41fa-b91a-80cd-2f5ece074421@csgroup.eu> (raw)
In-Reply-To: <20221107033202.1375238-1-rmclure@linux.ibm.com>
Le 07/11/2022 à 04:31, Rohan McLure a écrit :
> Add Kconfig option for enabling clearing of registers on arrival in an
> interrupt handler. This reduces the speculation influence of registers
> on kernel internals. The option will be consumed by 64-bit systems that
> feature speculation and wish to implement this mitigation.
>
> This patch only introduces the Kconfig option, no actual mitigations.
If that has to do with speculation, do we need a new Kconfig option ?
Can't we use CONFIG_PPC_BARRIER_NOSPEC for that ?
>
> The primary overhead of this mitigation lies in an increased number of
> registers that must be saved and restored by interrupt handlers on
> Book3S systems. Enable by default on Book3E systems, which prior to
> this patch eagerly save and restore register state, meaning that the
> mitigation when implemented will have minimal overhead.
>
> Acked-by: Nicholas Piggin <npiggin@gmail.com>
> Signed-off-by: Rohan McLure <rmclure@linux.ibm.com>
> ---
> Resubmitting patches as their own series after v6 partially merged:
> Link: https://lore.kernel.org/all/166488988686.779920.13794870102696416283.b4-ty@ellerman.id.au/t/
> ---
> arch/powerpc/Kconfig | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 2ca5418457ed..9d3d20c6f365 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -529,6 +529,15 @@ config HOTPLUG_CPU
>
> Say N if you are unsure.
>
> +config INTERRUPT_SANITIZE_REGISTERS
> + bool "Clear gprs on interrupt arrival"
> + depends on PPC64 && ARCH_HAS_SYSCALL_WRAPPER
> + default PPC_BOOK3E_64
> + help
> + Reduce the influence of user register state on interrupt handlers and
> + syscalls through clearing user state from registers before handling
> + the exception.
> +
> config PPC_QUEUED_SPINLOCKS
> bool "Queued spinlocks" if EXPERT
> depends on SMP
next prev parent reply other threads:[~2022-11-07 14:30 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-07 3:31 [PATCH v2 1/4] powerpc/64: Add INTERRUPT_SANITIZE_REGISTERS Kconfig Rohan McLure
2022-11-07 3:32 ` [PATCH v2 2/4] powerpc/64s: Clear gprs on interrupt routine entry on Book3S Rohan McLure
2022-11-28 1:52 ` Nicholas Piggin
2022-11-07 3:32 ` [PATCH v2 3/4] powerpc/64e: Clear gprs on interrupt routine entry on Book3E Rohan McLure
2022-11-28 2:02 ` Nicholas Piggin
2022-11-07 3:32 ` [PATCH v2 4/4] powerpc/64s: Sanitise user registers on interrupt in pseries Rohan McLure
2022-11-28 2:12 ` Nicholas Piggin
2022-11-07 14:28 ` Christophe Leroy [this message]
2022-11-28 1:42 ` [PATCH v2 1/4] powerpc/64: Add INTERRUPT_SANITIZE_REGISTERS Kconfig Nicholas Piggin
2022-11-07 16:39 ` Segher Boessenkool
2022-11-08 10:09 ` Nicholas Piggin
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