From: Shawn Lin <shawn.lin@rock-chips.com>
To: manivannan.sadhasivam@oss.qualcomm.com,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Mahesh J Salgaonkar" <mahesh@linux.ibm.com>,
"Oliver O'Halloran" <oohall@gmail.com>,
"Will Deacon" <will@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Philipp Zabel" <p.zabel@pengutronix.de>
Cc: shawn.lin@rock-chips.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org,
linux-rockchip@lists.infradead.org,
Niklas Cassel <cassel@kernel.org>,
Wilfred Mallawa <wilfred.mallawa@wdc.com>,
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>,
Lukas Wunner <lukas@wunner.de>,
Richard Zhu <hongxing.zhu@nxp.com>,
Brian Norris <briannorris@chromium.org>,
Wilson Ding <dingwei@marvell.com>, Frank Li <Frank.Li@nxp.com>
Subject: Re: [PATCH v7 1/4] PCI/ERR: Add support for resetting the Root Ports in a platform specific way
Date: Wed, 11 Mar 2026 13:26:28 +0800 [thread overview]
Message-ID: <e951b005-d9c9-224b-ed52-23abbccf7212@rock-chips.com> (raw)
In-Reply-To: <20260310-pci-port-reset-v7-1-9dd00ccc25ab@oss.qualcomm.com>
在 2026/03/10 星期二 22:01, Manivannan Sadhasivam via B4 Relay 写道:
> From: Manivannan Sadhasivam <mani@kernel.org>
>
> Some host bridge devices require resetting the Root Ports in a platform
> specific way to recover them from error conditions such as Fatal AER
> errors, Link Down etc... So introduce pci_host_bridge::reset_root_port()
> callback and call it from pcibios_reset_secondary_bus() if available. Also,
> save the Root Port config space before reset and restore it afterwards.
>
> The 'reset_root_port' callback is responsible for resetting the given Root
> Port referenced by the 'pci_dev' pointer in a platform specific way and
> bring it back to the working state if possible. If any error occurs during
> the reset operation, relevant errno should be returned.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
> Tested-by: Brian Norris <briannorris@chromium.org>
> Tested-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> Tested-by: Richard Zhu <hongxing.zhu@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> drivers/pci/pci.c | 20 ++++++++++++++++++++
> drivers/pci/pcie/err.c | 5 -----
> include/linux/pci.h | 1 +
> 3 files changed, 21 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 8479c2e1f74f..6f09057d83e0 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -4812,6 +4812,26 @@ void pci_reset_secondary_bus(struct pci_dev *dev)
>
> void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
> {
> + struct pci_host_bridge *host = pci_find_host_bridge(dev->bus);
> + int ret;
> +
> + if (pci_is_root_bus(dev->bus) && host->reset_root_port) {
> + /*
> + * Save the config space of the Root Port before doing the
> + * reset, since the state could be lost. The Endpoint state
> + * should've been saved by the caller.
> + */
> + pci_save_state(dev);
> + ret = host->reset_root_port(host, dev);
> + if (ret)
> + pci_err(dev, "Failed to reset Root Port: %d\n", ret);
> + else
> + /* Now restore it on success */
> + pci_restore_state(dev);
> +
> + return;
> + }
> +
> pci_reset_secondary_bus(dev);
> }
>
LGTM,
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
> diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c
> index bebe4bc111d7..13b9d9eb714f 100644
> --- a/drivers/pci/pcie/err.c
> +++ b/drivers/pci/pcie/err.c
> @@ -256,11 +256,6 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev,
> }
>
> if (status == PCI_ERS_RESULT_NEED_RESET) {
> - /*
> - * TODO: Should call platform-specific
> - * functions to reset slot before calling
> - * drivers' slot_reset callbacks?
> - */
> status = PCI_ERS_RESULT_RECOVERED;
> pci_dbg(bridge, "broadcast slot_reset message\n");
> pci_walk_bridge(bridge, report_slot_reset, &status);
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 1c270f1d5123..34c434b79abb 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -644,6 +644,7 @@ struct pci_host_bridge {
> void (*release_fn)(struct pci_host_bridge *);
> int (*enable_device)(struct pci_host_bridge *bridge, struct pci_dev *dev);
> void (*disable_device)(struct pci_host_bridge *bridge, struct pci_dev *dev);
> + int (*reset_root_port)(struct pci_host_bridge *bridge, struct pci_dev *dev);
> void *release_data;
> unsigned int ignore_reset_delay:1; /* For entire hierarchy */
> unsigned int no_ext_tags:1; /* No Extended Tags */
>
next prev parent reply other threads:[~2026-03-11 17:48 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-10 14:01 [PATCH v7 0/4] PCI: Add support for resetting the Root Ports in a platform specific way Manivannan Sadhasivam via B4 Relay
2026-03-10 14:01 ` [PATCH v7 1/4] PCI/ERR: " Manivannan Sadhasivam via B4 Relay
2026-03-11 5:26 ` Shawn Lin [this message]
2026-03-10 14:02 ` [PATCH v7 2/4] PCI: host-common: Add link down handling for Root Ports Manivannan Sadhasivam via B4 Relay
2026-03-11 0:55 ` Shawn Lin
2026-03-11 5:04 ` Manivannan Sadhasivam
2026-03-11 5:20 ` Shawn Lin
2026-03-10 14:02 ` [PATCH v7 3/4] PCI: qcom: Add support for resetting the Root Port due to link down event Manivannan Sadhasivam via B4 Relay
2026-03-10 14:02 ` [PATCH v7 4/4] misc: pci_endpoint_test: Add AER error handlers Manivannan Sadhasivam via B4 Relay
2026-03-11 8:37 ` [PATCH v7 0/4] PCI: Add support for resetting the Root Ports in a platform specific way Krishna Chaitanya Chundru
2026-03-11 11:05 ` Niklas Cassel
2026-03-11 14:39 ` Manivannan Sadhasivam
2026-03-11 15:14 ` Manivannan Sadhasivam
2026-03-17 11:16 ` Niklas Cassel
2026-03-17 13:11 ` Niklas Cassel
2026-03-25 7:06 ` Hongxing Zhu
2026-04-09 1:58 ` Brian Norris
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