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From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: "Frank Li" <Frank.li@nxp.com>,
	"Niklas Cassel" <cassel@kernel.org>,
	"Minghuan Lian" <minghuan.Lian@nxp.com>,
	"Mingkai Hu" <mingkai.hu@nxp.com>, "Roy Zang" <roy.zang@nxp.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Srikanth Thokala" <srikanth.thokala@intel.com>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Kunihiko Hayashi" <hayashi.kunihiko@socionext.com>,
	"Masami Hiramatsu" <mhiramat@kernel.org>,
	"Marek Vasut" <marek.vasut+renesas@gmail.com>,
	"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Magnus Damm" <magnus.damm@gmail.com>,
	"Kishon Vijay Abraham I" <kishon@kernel.org>,
	"Koichiro Den" <den@valinux.co.jp>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
	linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH 1/9] PCI: endpoint: Introduce pci_epc_bar_type BAR_64BIT_UPPER
Date: Tue, 24 Feb 2026 19:24:14 +0530	[thread overview]
Message-ID: <efd07d25-4db1-4fdc-a6d9-f6f16ae8a37b@nvidia.com> (raw)
In-Reply-To: <CAMuHMdVTY=tV_3qq3gDuAHPjXnexT0Qq9SK39V-U2ACbvLRsaw@mail.gmail.com>



On 23/02/26 3:44 pm, Geert Uytterhoeven wrote:
> Hi Manikanta,
> 
> On Mon, 23 Feb 2026 at 04:57, Manikanta Maddireddy
> <mmaddireddy@nvidia.com> wrote:
>> On 18/02/26 3:27 am, Frank Li wrote:
>>
>> On Tue, Feb 17, 2026 at 10:27:07PM +0100, Niklas Cassel wrote:
>>
>> Add a pci_epc_bar_type BAR_64BIT_UPPER to more clearly differentiate
>> BAR_64BIT_UPPER from BAR_RESERVED.
>>
>> This BAR type will only be used for a BAR following a "only_64bit" BAR.
>>
>> This makes the BAR description more clear, and the reader does no longer
>> need to check the BAR type for the preceding BAR to know how to interpret
>> the BAR type.
>>
>> No functional changes.
>>
>> Signed-off-by: Niklas Cassel <cassel@kernel.org>
>> ---
>>
>> Reviewed-by: Frank Li <Frank.Li@nxp.com>
>>
>> Tested by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> 
> [...]
> 
> Please do not send HTML emails to the list, as they are rejected.
> 
> Gr{oetje,eeting}s,
> 
>                          Geert
> 

Apologies, I failed to realize that compose as html is checked in
my thunderbird client. I fixed it now.

Thanks,
Manikanta

-- 
nvpublic



  reply	other threads:[~2026-02-24 13:55 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-17 21:27 [PATCH 0/9] PCI: endpoint differentiate between disabled and reserved BARs Niklas Cassel
2026-02-17 21:27 ` [PATCH 1/9] PCI: endpoint: Introduce pci_epc_bar_type BAR_64BIT_UPPER Niklas Cassel
2026-02-17 21:57   ` Frank Li
2026-02-23  3:57     ` Manikanta Maddireddy
2026-02-23 10:14       ` Geert Uytterhoeven
2026-02-24 13:54         ` Manikanta Maddireddy [this message]
2026-02-17 21:27 ` [PATCH 6/9] PCI: dwc: Disable BARs in common code instead of in each glue driver Niklas Cassel
2026-02-17 23:00   ` Frank Li
2026-02-23  4:55     ` Manikanta Maddireddy
2026-02-23  3:49 ` [PATCH 0/9] PCI: endpoint differentiate between disabled and reserved BARs Manikanta Maddireddy

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