From: Jordan Niethe <jniethe5@gmail.com>
To: Nicholas Piggin <npiggin@gmail.com>, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 06/17] powerpc/qspinlock: theft prevention to control latency
Date: Wed, 10 Aug 2022 15:51:05 +1000 [thread overview]
Message-ID: <eff017a9afff2477b04a7927d03217924e01f560.camel@gmail.com> (raw)
In-Reply-To: <20220728063120.2867508-8-npiggin@gmail.com>
On Thu, 2022-07-28 at 16:31 +1000, Nicholas Piggin wrote:
> Give the queue head the ability to stop stealers. After a number of
> spins without sucessfully acquiring the lock, the queue head employs
> this, which will assure it is the next owner.
> ---
> arch/powerpc/include/asm/qspinlock_types.h | 10 +++-
> arch/powerpc/lib/qspinlock.c | 56 +++++++++++++++++++++-
> 2 files changed, 63 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/qspinlock_types.h b/arch/powerpc/include/asm/qspinlock_types.h
> index 210adf05b235..8b20f5e22bba 100644
> --- a/arch/powerpc/include/asm/qspinlock_types.h
> +++ b/arch/powerpc/include/asm/qspinlock_types.h
> @@ -29,7 +29,8 @@ typedef struct qspinlock {
> * Bitfields in the lock word:
> *
> * 0: locked bit
> - * 16-31: tail cpu (+1)
> + * 16: must queue bit
> + * 17-31: tail cpu (+1)
> */
> #define _Q_SET_MASK(type) (((1U << _Q_ ## type ## _BITS) - 1)\
> << _Q_ ## type ## _OFFSET)
> @@ -38,7 +39,12 @@ typedef struct qspinlock {
> #define _Q_LOCKED_MASK _Q_SET_MASK(LOCKED)
> #define _Q_LOCKED_VAL (1U << _Q_LOCKED_OFFSET)
>
> -#define _Q_TAIL_CPU_OFFSET 16
> +#define _Q_MUST_Q_OFFSET 16
> +#define _Q_MUST_Q_BITS 1
> +#define _Q_MUST_Q_MASK _Q_SET_MASK(MUST_Q)
> +#define _Q_MUST_Q_VAL (1U << _Q_MUST_Q_OFFSET)
> +
> +#define _Q_TAIL_CPU_OFFSET 17
> #define _Q_TAIL_CPU_BITS (32 - _Q_TAIL_CPU_OFFSET)
> #define _Q_TAIL_CPU_MASK _Q_SET_MASK(TAIL_CPU)
Not a big deal but some of these values could be calculated like in the
generic version. e.g.
#define _Q_PENDING_OFFSET (_Q_LOCKED_OFFSET +_Q_LOCKED_BITS)
>
> diff --git a/arch/powerpc/lib/qspinlock.c b/arch/powerpc/lib/qspinlock.c
> index 1625cce714b2..a906cc8f15fa 100644
> --- a/arch/powerpc/lib/qspinlock.c
> +++ b/arch/powerpc/lib/qspinlock.c
> @@ -22,6 +22,7 @@ struct qnodes {
> /* Tuning parameters */
> static int STEAL_SPINS __read_mostly = (1<<5);
> static bool MAYBE_STEALERS __read_mostly = true;
> +static int HEAD_SPINS __read_mostly = (1<<8);
>
> static DEFINE_PER_CPU_ALIGNED(struct qnodes, qnodes);
>
> @@ -30,6 +31,11 @@ static __always_inline int get_steal_spins(void)
> return STEAL_SPINS;
> }
>
> +static __always_inline int get_head_spins(void)
> +{
> + return HEAD_SPINS;
> +}
> +
> static inline u32 encode_tail_cpu(void)
> {
> return (smp_processor_id() + 1) << _Q_TAIL_CPU_OFFSET;
> @@ -142,6 +148,23 @@ static __always_inline u32 publish_tail_cpu(struct qspinlock *lock, u32 tail)
> return prev;
> }
>
> +static __always_inline u32 lock_set_mustq(struct qspinlock *lock)
> +{
> + u32 new = _Q_MUST_Q_VAL;
> + u32 prev;
> +
> + asm volatile(
> +"1: lwarx %0,0,%1 # lock_set_mustq \n"
Is the EH bit not set because we don't hold the lock here?
> +" or %0,%0,%2 \n"
> +" stwcx. %0,0,%1 \n"
> +" bne- 1b \n"
> + : "=&r" (prev)
> + : "r" (&lock->val), "r" (new)
> + : "cr0", "memory");
This is another usage close to the DEFINE_TESTOP() pattern.
> +
> + return prev;
> +}
> +
> static struct qnode *get_tail_qnode(struct qspinlock *lock, u32 val)
> {
> int cpu = get_tail_cpu(val);
> @@ -165,6 +188,9 @@ static inline bool try_to_steal_lock(struct qspinlock *lock)
> for (;;) {
> u32 val = READ_ONCE(lock->val);
>
> + if (val & _Q_MUST_Q_VAL)
> + break;
> +
> if (unlikely(!(val & _Q_LOCKED_VAL))) {
> if (trylock_with_tail_cpu(lock, val))
> return true;
> @@ -246,11 +272,22 @@ static inline void queued_spin_lock_mcs_queue(struct qspinlock *lock)
> /* We must be the owner, just set the lock bit and acquire */
> lock_set_locked(lock);
> } else {
> + int iters = 0;
> + bool set_mustq = false;
> +
> again:
> /* We're at the head of the waitqueue, wait for the lock. */
> - while ((val = READ_ONCE(lock->val)) & _Q_LOCKED_VAL)
> + while ((val = READ_ONCE(lock->val)) & _Q_LOCKED_VAL) {
> cpu_relax();
>
> + iters++;
It seems instead of using set_mustq, (val & _Q_MUST_Q_VAL) could be checked?
> + if (!set_mustq && iters >= get_head_spins()) {
> + set_mustq = true;
> + lock_set_mustq(lock);
> + val |= _Q_MUST_Q_VAL;
> + }
> + }
> +
> /* If we're the last queued, must clean up the tail. */
> if ((val & _Q_TAIL_CPU_MASK) == tail) {
> if (trylock_clear_tail_cpu(lock, val))
> @@ -329,9 +366,26 @@ static int steal_spins_get(void *data, u64 *val)
>
> DEFINE_SIMPLE_ATTRIBUTE(fops_steal_spins, steal_spins_get, steal_spins_set, "%llu\n");
>
> +static int head_spins_set(void *data, u64 val)
> +{
> + HEAD_SPINS = val;
> +
> + return 0;
> +}
> +
> +static int head_spins_get(void *data, u64 *val)
> +{
> + *val = HEAD_SPINS;
> +
> + return 0;
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(fops_head_spins, head_spins_get, head_spins_set, "%llu\n");
> +
> static __init int spinlock_debugfs_init(void)
> {
> debugfs_create_file("qspl_steal_spins", 0600, arch_debugfs_dir, NULL, &fops_steal_spins);
> + debugfs_create_file("qspl_head_spins", 0600, arch_debugfs_dir, NULL, &fops_head_spins);
>
> return 0;
> }
next prev parent reply other threads:[~2022-08-10 5:51 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-28 6:31 [PATCH 00/17] powerpc: alternate queued spinlock implementation Nicholas Piggin
2022-07-28 6:31 ` [PATCH 01/17] powerpc/qspinlock: powerpc qspinlock implementation Nicholas Piggin
2022-08-10 1:52 ` Jordan NIethe
2022-08-10 6:48 ` Christophe Leroy
2022-11-10 0:35 ` Jordan Niethe
2022-11-10 6:37 ` Christophe Leroy
2022-11-10 11:44 ` Nicholas Piggin
2022-11-10 9:09 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 1a/17] powerpc/qspinlock: Prepare qspinlock code Nicholas Piggin
2022-07-28 6:31 ` [PATCH 02/17] powerpc/qspinlock: add mcs queueing for contended waiters Nicholas Piggin
2022-08-10 2:28 ` Jordan NIethe
2022-11-10 0:36 ` Jordan Niethe
2022-11-10 9:21 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 03/17] powerpc/qspinlock: use a half-word store to unlock to avoid larx/stcx Nicholas Piggin
2022-08-10 3:28 ` Jordan Niethe
2022-11-10 0:39 ` Jordan Niethe
2022-11-10 9:25 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 04/17] powerpc/qspinlock: convert atomic operations to assembly Nicholas Piggin
2022-08-10 3:54 ` Jordan Niethe
2022-11-10 0:39 ` Jordan Niethe
2022-11-10 8:36 ` Christophe Leroy
2022-11-10 11:48 ` Nicholas Piggin
2022-11-10 9:40 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 05/17] powerpc/qspinlock: allow new waiters to steal the lock before queueing Nicholas Piggin
2022-08-10 4:31 ` Jordan Niethe
2022-11-10 0:40 ` Jordan Niethe
2022-11-10 10:54 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 06/17] powerpc/qspinlock: theft prevention to control latency Nicholas Piggin
2022-08-10 5:51 ` Jordan Niethe [this message]
2022-11-10 0:40 ` Jordan Niethe
2022-11-10 10:57 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 07/17] powerpc/qspinlock: store owner CPU in lock word Nicholas Piggin
2022-08-12 0:50 ` Jordan Niethe
2022-11-10 0:40 ` Jordan Niethe
2022-11-10 10:59 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 08/17] powerpc/qspinlock: paravirt yield to lock owner Nicholas Piggin
2022-08-12 2:01 ` Jordan Niethe
2022-11-10 0:41 ` Jordan Niethe
2022-11-10 11:13 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 09/17] powerpc/qspinlock: implement option to yield to previous node Nicholas Piggin
2022-08-12 2:07 ` Jordan Niethe
2022-11-10 0:41 ` Jordan Niethe
2022-11-10 11:14 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 10/17] powerpc/qspinlock: allow stealing when head of queue yields Nicholas Piggin
2022-08-12 4:06 ` Jordan Niethe
2022-11-10 0:42 ` Jordan Niethe
2022-11-10 11:22 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 11/17] powerpc/qspinlock: allow propagation of yield CPU down the queue Nicholas Piggin
2022-08-12 4:17 ` Jordan Niethe
2022-10-06 17:27 ` Laurent Dufour
2022-11-10 0:42 ` Jordan Niethe
2022-11-10 11:25 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 12/17] powerpc/qspinlock: add ability to prod new queue head CPU Nicholas Piggin
2022-08-12 4:22 ` Jordan Niethe
2022-11-10 0:42 ` Jordan Niethe
2022-11-10 11:32 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 13/17] powerpc/qspinlock: trylock and initial lock attempt may steal Nicholas Piggin
2022-08-12 4:32 ` Jordan Niethe
2022-11-10 0:43 ` Jordan Niethe
2022-11-10 11:35 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 14/17] powerpc/qspinlock: use spin_begin/end API Nicholas Piggin
2022-08-12 4:36 ` Jordan Niethe
2022-11-10 0:43 ` Jordan Niethe
2022-11-10 11:36 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 15/17] powerpc/qspinlock: reduce remote node steal spins Nicholas Piggin
2022-08-12 4:43 ` Jordan Niethe
2022-11-10 0:43 ` Jordan Niethe
2022-11-10 11:37 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 16/17] powerpc/qspinlock: allow indefinite spinning on a preempted owner Nicholas Piggin
2022-08-12 4:49 ` Jordan Niethe
2022-09-22 15:02 ` Laurent Dufour
2022-09-23 8:16 ` Nicholas Piggin
2022-11-10 0:44 ` Jordan Niethe
2022-11-10 11:38 ` Nicholas Piggin
2022-07-28 6:31 ` [PATCH 17/17] powerpc/qspinlock: provide accounting and options for sleepy locks Nicholas Piggin
2022-08-15 1:11 ` Jordan Niethe
2022-11-10 0:44 ` Jordan Niethe
2022-11-10 11:41 ` Nicholas Piggin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=eff017a9afff2477b04a7927d03217924e01f560.camel@gmail.com \
--to=jniethe5@gmail.com \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=npiggin@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).