From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from penguin.netx4.com (embeddededge.com [209.113.146.155]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTP id B653D6817D for ; Wed, 31 Aug 2005 00:36:13 +1000 (EST) In-Reply-To: <9FCDBA58F226D911B202000BDBAD467302BEB8C6@zch01exm40.ap.freescale.net> References: <9FCDBA58F226D911B202000BDBAD467302BEB8C6@zch01exm40.ap.freescale.net> Mime-Version: 1.0 (Apple Message framework v622) Content-Type: text/plain; charset=US-ASCII; format=flowed Message-Id: From: Dan Malek Date: Tue, 30 Aug 2005 10:36:00 -0400 To: Li Tony-r64360 Cc: linuxppc-embedded , Chu hanjin-r52514 , linux-kernel@vger.kernel.org Subject: Re: [PATCH] ppc32 :Added PCI support for MPC83xx List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Aug 29, 2005, at 11:02 PM, Li Tony-r64360 wrote: > I think it is OK. The external interrupt can be edged. And it works > well in my board. No, it can't. PCI interrupts must be level sensitive because multiple slots can share an interrupt. Thanks. -- Dan