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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 23 Mar 2020 06:06:01 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 02N660Ag32571790 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 23 Mar 2020 06:06:00 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C27D1A406B; Mon, 23 Mar 2020 06:06:00 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F179CA4057; Mon, 23 Mar 2020 06:05:58 +0000 (GMT) Received: from localhost.localdomain (unknown [9.199.48.63]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 23 Mar 2020 06:05:58 +0000 (GMT) Subject: Re: [PATCH v4 02/16] xmon: Move out-of-line instructions to text section From: Balamuruhan S To: Jordan Niethe , linuxppc-dev@lists.ozlabs.org In-Reply-To: <20200320051809.24332-3-jniethe5@gmail.com> References: <20200320051809.24332-1-jniethe5@gmail.com> <20200320051809.24332-3-jniethe5@gmail.com> Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Mon, 23 Mar 2020 11:29:42 +0530 User-Agent: Evolution 3.34.3 (3.34.3-1.fc31) Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 x-cbid: 20032306-0012-0000-0000-000003960146 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20032306-0013-0000-0000-000021D2F028 Message-Id: X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.645 definitions=2020-03-23_01:2020-03-21, 2020-03-23 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 malwarescore=0 mlxlogscore=869 spamscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2003230037 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair@popple.id.au, dja@axtens.net, npiggin@gmail.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, 2020-03-20 at 16:17 +1100, Jordan Niethe wrote: > To execute an instruction out of line after a breakpoint, the NIP is > set > to the address of struct bpt::instr. Here a copy of the instruction > that > was replaced with a breakpoint is kept, along with a trap so normal > flow > can be resumed after XOLing. The struct bpt's are located within the > data section. This is problematic as the data section may be marked > as > no execute. > > Instead of each struct bpt holding the instructions to be XOL'd, make > a > new array, bpt_table[], with enough space to hold instructions for > the > number of supported breakpoints. Place this array in the text > section. > Make struct bpt::instr a pointer to the instructions in bpt_table[] > associated with that breakpoint. This association is a simple > mapping: > bpts[n] -> bpt_table[n * words per breakpoint]. Can it separate commits ? * introduce the array bpt_table[] and make struct bpt::instr a pointer to the instructions in bpt_table[]. * place the array in text section. > Currently we only need > the copied instruction followed by a trap, so 2 words per breakpoint. > > Signed-off-by: Jordan Niethe > --- > v4: New to series > --- > arch/powerpc/kernel/vmlinux.lds.S | 2 +- > arch/powerpc/xmon/xmon.c | 22 +++++++++++++--------- > 2 files changed, 14 insertions(+), 10 deletions(-) > > diff --git a/arch/powerpc/kernel/vmlinux.lds.S > b/arch/powerpc/kernel/vmlinux.lds.S > index b4c89a1acebb..e90845b8c300 100644 > --- a/arch/powerpc/kernel/vmlinux.lds.S > +++ b/arch/powerpc/kernel/vmlinux.lds.S > @@ -86,7 +86,7 @@ SECTIONS > ALIGN_FUNCTION(); > #endif > /* careful! __ftr_alt_* sections need to be close to > .text */ > - *(.text.hot TEXT_MAIN .text.fixup .text.unlikely .fixup > __ftr_alt_* .ref.text); > + *(.text.hot TEXT_MAIN .text.fixup .text.unlikely .fixup > __ftr_alt_* .ref.text .text.xmon_bpts); > #ifdef CONFIG_PPC64 > *(.tramp.ftrace.text); > #endif > diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c > index 02e3bd62cab4..7875d1a37770 100644 > --- a/arch/powerpc/xmon/xmon.c > +++ b/arch/powerpc/xmon/xmon.c > @@ -97,7 +97,7 @@ static long *xmon_fault_jmp[NR_CPUS]; > /* Breakpoint stuff */ > struct bpt { > unsigned long address; > - unsigned int instr[2]; > + unsigned int *instr; > atomic_t ref_count; > int enabled; > unsigned long pad; > @@ -109,6 +109,7 @@ struct bpt { > #define BP_DABR 4 > > #define NBPTS 256 > +#define BPT_WORDS 2 > static struct bpt bpts[NBPTS]; > static struct bpt dabr; > static struct bpt *iabr; > @@ -116,6 +117,8 @@ static unsigned bpinstr = 0x7fe00008; /* trap > */ > > #define BP_NUM(bp) ((bp) - bpts + 1) > > +static unsigned int __section(.text.xmon_bpts) bpt_table[NBPTS * > BPT_WORDS]; > + > /* Prototypes */ > static int cmds(struct pt_regs *); > static int mread(unsigned long, void *, int); > @@ -852,16 +855,16 @@ static struct bpt *at_breakpoint(unsigned long > pc) > static struct bpt *in_breakpoint_table(unsigned long nip, unsigned > long *offp) > { > unsigned long off; > + unsigned long bp_off; > > - off = nip - (unsigned long) bpts; > - if (off >= sizeof(bpts)) > + off = nip - (unsigned long) bpt_table; > + if (off >= sizeof(bpt_table)) > return NULL; > - off %= sizeof(struct bpt); > - if (off != offsetof(struct bpt, instr[0]) > - && off != offsetof(struct bpt, instr[1])) > + bp_off = off % (sizeof(unsigned int) * BPT_WORDS); > + if (bp_off != 0 && bp_off != 4) > return NULL; > - *offp = off - offsetof(struct bpt, instr[0]); > - return (struct bpt *) (nip - off); > + *offp = bp_off; > + return bpts + ((off - bp_off) / (sizeof(unsigned int) * > BPT_WORDS)); `(off - bp_off) / (sizeof(unsigned int) * BPT_WORDS)` seems to be the actual breakpoint offset. Can we have something like, #define NBPTS 256 #define BPT_WORDS 2 #define BPT_WORDS_SIZE (sizeof(unsigned int) * BPT_WORDS) #define BPT_OFFSET(off, bp_word_off) ((off - bp_word_off) / BPT_WOR DS_SIZE); ::: ::: ::: bp_word_off = off % BPT_WORDS_SIZE; if (bp_word_off != 0 && bp_word_off != 4) return NULL; *offp = bp_word_off; return bpts + BPT_OFFSET(off, bp_word_off); -- Bala > } static struct bpt *new_breakpoint(unsigned long a) @@ -876,7 > +879,8 @@ static struct bpt *new_breakpoint(unsigned long a) for (bp > = bpts; bp < &bpts[NBPTS]; ++bp) { if (!bp->enabled && > atomic_read(&bp->ref_count) == 0) { bp->address = > a; - patch_instruction(&bp->instr[1], bpinstr); + > bp->instr = bpt_table + ((bp - bpts) * BPT_WORDS); + > patch_instruction(bp->instr + 1, bpinstr); > return bp; } }