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Tue, 10 Mar 2026 09:29:40 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 60F4240565; Tue, 10 Mar 2026 09:34:34 +0800 (CST) Received: from [10.67.109.254] (10.67.109.254) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 10 Mar 2026 09:34:29 +0800 Message-ID: Date: Tue, 10 Mar 2026 09:34:28 +0800 X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.2.0 Subject: Re: [PATCH v8 0/5] arm64/riscv: Add support for crashkernel CMA reservation Content-Language: en-US To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , References: <20260302035315.3892241-1-ruanjinjie@huawei.com> From: Jinjie Ruan In-Reply-To: <20260302035315.3892241-1-ruanjinjie@huawei.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.109.254] X-ClientProxiedBy: kwepems500002.china.huawei.com (7.221.188.17) To dggpemf500011.china.huawei.com (7.185.36.131) On 2026/3/2 11:53, Jinjie Ruan wrote: > The crash memory allocation, and the exclude of crashk_res, crashk_low_res > and crashk_cma memory are almost identical across different architectures, > This patch set handle them in crash core in a general way, which eliminate > a lot of duplication code. > > And add support for crashkernel CMA reservation for arm64 and riscv. Hi all, Do you have any new review comments on this patch set? Thanks, > > Rebased on v7.0-rc1. > > Basic second kernel boot test were performed on QEMU platforms for x86, > ARM64, and RISC-V architectures with the following parameters: > > "cma=256M crashkernel=256M crashkernel=64M,cma" > > Changes in v8: > - Fix the build issues reported by kernel test robot and Sourabh. > - Link to v7: https://lore.kernel.org/all/20260226130437.1867658-1-ruanjinjie@huawei.com/ > > Changes in v7: > - Correct the inclusion of CMA-reserved ranges for kdump kernel in of/kexec > for arm64 and riscv. > - Add Acked-by. > - Link to v6: https://lore.kernel.org/all/20260224085342.387996-1-ruanjinjie@huawei.com/ > > Changes in v6: > - Update the crash core exclude code as Mike suggested. > - Rebased on v7.0-rc1. > - Add acked-by. > - Link to v5: https://lore.kernel.org/all/20260212101001.343158-1-ruanjinjie@huawei.com/ > > Changes in v5: > - Fix the kernel test robot build warnings. > - Sort crash memory ranges before preparing elfcorehdr for powerpc > - Link to v4: https://lore.kernel.org/all/20260209095931.2813152-1-ruanjinjie@huawei.com/ > > Changes in v4: > - Move the size calculation (and the realloc if needed) into the > generic crash. > - Link to v3: https://lore.kernel.org/all/20260204093728.1447527-1-ruanjinjie@huawei.com/ > > Jinjie Ruan (4): > crash: Exclude crash kernel memory in crash core > crash: Use crash_exclude_core_ranges() on powerpc > arm64: kexec: Add support for crashkernel CMA reservation > riscv: kexec: Add support for crashkernel CMA reservation > > Sourabh Jain (1): > powerpc/crash: sort crash memory ranges before preparing elfcorehdr > > .../admin-guide/kernel-parameters.txt | 16 +-- > arch/arm64/kernel/machine_kexec_file.c | 39 +++---- > arch/arm64/mm/init.c | 5 +- > arch/loongarch/kernel/machine_kexec_file.c | 39 +++---- > arch/powerpc/include/asm/kexec_ranges.h | 1 - > arch/powerpc/kexec/crash.c | 5 +- > arch/powerpc/kexec/ranges.c | 101 +----------------- > arch/riscv/kernel/machine_kexec_file.c | 38 +++---- > arch/riscv/mm/init.c | 5 +- > arch/x86/kernel/crash.c | 89 +++------------ > drivers/of/fdt.c | 9 +- > drivers/of/kexec.c | 9 ++ > include/linux/crash_core.h | 9 ++ > kernel/crash_core.c | 89 ++++++++++++++- > 14 files changed, 178 insertions(+), 276 deletions(-) >