Re: [PATCH] ppc32: refactor FPU exception handling

[Kumar Gala <kumar.gala@freescale.com>]

Ben,

Sorry about that, we have had some back and forth on this on the ppc=20
embedded list.

Not sure I understand your concern about the duplication of the fast=20
exception return path?  Jason's patch pretty much just moved code out=20
of head.S into fpu.S so we dont duplicate it between head.S and=20
head_44x.S & head_fsl_booke.S

- kumar

On Apr 11, 2005, at 9:28 PM, Benjamin Herrenschmidt wrote:

> On Mon, 2005-04-11 at 17:02 -0500, Kumar Gala wrote:
>  > Andrew,
>  >
> > Moved common FPU exception handling code out of head.S so it can be=20=

> used
> > by several of the sub-architectures that might of a full PowerPC=20
> FPU.=A0
> >
> > Also, uses new CONFIG_PPC_FPU define to fix alignment exception
> > handling for floating point load/store instructions to only occur if=20=

> we
> > have a hardware FPU.
> >
> > Signed-off-by: Jason McMullan <jason.mcmullan@timesys.com>
> > Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
>
>
>
> Andrew, please hold on this patch, it hasn't been properly discussed
>  with the relevant maintainer, that is Paul Mackerras.
>
> I can see matter for debate in there, like the whole duplication of =
the
>  fast exception return path...
>
> It's also touching quite sensitive bits of kernel code (head.S) that
>  needs careful auditing and testing before beeing pushed upstream.
>
> Ben.