From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Michael Neuling <mikey@neuling.org>,
Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>,
Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>,
Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
"Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
Subject: [PATCH 1/6] powernv:idle: Correctly initialize core_idle_state_ptr
Date: Tue, 16 May 2017 14:19:43 +0530 [thread overview]
Message-ID: <f6c49fcf42b78c0b8bdad17d6e659679c0288cd9.1494585671.git.ego@linux.vnet.ibm.com> (raw)
In-Reply-To: <cover.1494585671.git.ego@linux.vnet.ibm.com>
In-Reply-To: <cover.1494585671.git.ego@linux.vnet.ibm.com>
From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
The lower 8 bits of core_idle_state_ptr tracks the number of non-idle
threads in the core. This is supposed to be initialized to bit-map
corresponding to the threads_per_core. However, currently it is
initialized to PNV_CORE_IDLE_THREAD_BITS (0xFF). This is correct for
POWER8 which has 8 threads per core, but not for POWER9 which has 4
threads per core.
As a result, on POWER9, core_idle_state_ptr gets initialized to
0xFF. In case when all the threads of the core are idle, the bits
corresponding tracking the idle-threads are non-zero. As a result, the
idle entry/exit code fails to save/restore per-core hypervisor state
since it assumes that there are threads in the cores which are still
active.
Fix this by correctly initializing the lower bits of the
core_idle_state_ptr on the basis of threads_per_core.
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
---
arch/powerpc/platforms/powernv/idle.c | 29 +++++++++++++++++++----------
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c
index 445f30a..84eb9bc 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -96,15 +96,24 @@ static void pnv_alloc_idle_core_states(void)
u32 *core_idle_state;
/*
- * core_idle_state - First 8 bits track the idle state of each thread
- * of the core. The 8th bit is the lock bit. Initially all thread bits
- * are set. They are cleared when the thread enters deep idle state
- * like sleep and winkle. Initially the lock bit is cleared.
- * The lock bit has 2 purposes
- * a. While the first thread is restoring core state, it prevents
- * other threads in the core from switching to process context.
- * b. While the last thread in the core is saving the core state, it
- * prevents a different thread from waking up.
+ * core_idle_state - The lower 8 bits track the idle state of
+ * each thread of the core.
+ *
+ * The most significant bit is the lock bit.
+ *
+ * Initially all the bits corresponding to threads_per_core
+ * are set. They are cleared when the thread enters deep idle
+ * state like sleep and winkle/stop.
+ *
+ * Initially the lock bit is cleared. The lock bit has 2
+ * purposes:
+ * a. While the first thread in the core waking up from
+ * idle is restoring core state, it prevents other
+ * threads in the core from switching to process
+ * context.
+ * b. While the last thread in the core is saving the
+ * core state, it prevents a different thread from
+ * waking up.
*/
for (i = 0; i < nr_cores; i++) {
int first_cpu = i * threads_per_core;
@@ -112,7 +121,7 @@ static void pnv_alloc_idle_core_states(void)
size_t paca_ptr_array_size;
core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, node);
- *core_idle_state = PNV_CORE_IDLE_THREAD_BITS;
+ *core_idle_state = (1 << threads_per_core) - 1;
paca_ptr_array_size = (threads_per_core *
sizeof(struct paca_struct *));
--
1.8.3.1
next prev parent reply other threads:[~2017-05-16 8:50 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-16 8:49 [PATCH 0/6] Enable support for deep-stop states on POWER9 Gautham R. Shenoy
2017-05-16 8:49 ` Gautham R. Shenoy [this message]
2017-05-30 5:56 ` [PATCH 1/6] powernv:idle: Correctly initialize core_idle_state_ptr Nicholas Piggin
2017-05-30 10:23 ` Gautham R Shenoy
2017-05-30 9:11 ` [1/6] " Michael Ellerman
2017-05-16 8:49 ` [PATCH 2/6] powernv:idle: Decouple Timebase restore & Per-core SPRs restore Gautham R. Shenoy
2017-05-30 6:12 ` Nicholas Piggin
2017-05-30 10:28 ` Gautham R Shenoy
2017-05-16 8:49 ` [PATCH 3/6] powernv:idle: Restore LPCR on wakeup from deep-stop Gautham R. Shenoy
2017-05-30 6:17 ` Nicholas Piggin
2017-05-30 10:35 ` Gautham R Shenoy
2017-05-16 8:49 ` [PATCH 4/6] powernv:idle: Restore SPRs for deep idle states via stop API Gautham R. Shenoy
2017-05-16 8:49 ` [PATCH 5/6] powernv:idle: Use Requested Level for restoring state on P9 DD1 Gautham R. Shenoy
2017-05-30 6:27 ` Nicholas Piggin
2017-05-16 8:49 ` [PATCH 6/6] cpuidle-powernv: Allow Deep stop states that don't stop time Gautham R. Shenoy
2017-05-30 7:13 ` Nicholas Piggin
2017-05-30 10:50 ` Gautham R Shenoy
2017-05-30 11:10 ` Nicholas Piggin
2017-05-31 8:39 ` Gautham R Shenoy
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