From: Dan Malek <dan@embeddededge.com>
To: Guillaume Autran <gautran@mrv.com>
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: [PATCH] ppc32: fix cpm_uart_int() missing interrupts
Date: Fri, 20 May 2005 10:19:28 -0400 [thread overview]
Message-ID: <f751960e7a7299d7f28c54b53417ac57@embeddededge.com> (raw)
In-Reply-To: <428CF8D3.2070006@mrv.com>
On May 19, 2005, at 4:36 PM, Guillaume Autran wrote:
> One thought though, if the event register is cleared _before_=A0 the=20=
> event is processed (clearing the cause),
The cause of the event is it set completion flags on the buffer=20
descriptors.
> will the cpm set the bit again (before we have time to clear the=20
> cause) ? That would generate 2 interrupts for the same event ? Am I=20
> right ?
No, it will work fine.
Thanks.
-- Dan
prev parent reply other threads:[~2005-05-20 14:19 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-05-18 17:09 [PATCH] ppc32: fix CONFIG_TASK_SIZE handling on 40x Eugene Surovegin
2005-05-19 17:59 ` [PATCH] ppc32: fix cpm_uart_int() missing interrupts Guillaume Autran
2005-05-19 18:11 ` Dan Malek
2005-05-19 19:34 ` Guillaume Autran
2005-05-19 19:54 ` Dan Malek
2005-05-19 20:26 ` Guillaume Autran
2005-05-19 20:32 ` Dan Malek
2005-05-19 20:36 ` Guillaume Autran
2005-05-20 14:19 ` Dan Malek [this message]
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