* lite5200b, trouble with dtb
@ 2007-05-21 11:53 Pradyumna Sampath
2007-05-29 5:41 ` Pradyumna Sampath
0 siblings, 1 reply; 2+ messages in thread
From: Pradyumna Sampath @ 2007-05-21 11:53 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 1001 bytes --]
Hi everyone,
Last time around (
http://www.mail-archive.com/linuxppc-embedded@ozlabs.org/msg02602.html
) , I was trying to boot my lite5200 eval board with v2.6.20-rt3 and
was advised to boot with the dtb files.
This time around Im trying to boot my custom lite5200B board with the
dtb file thats comes with the vanilla kernel and it hangs at the same
point ( "Transferring control to linux (at address 00000000 ..." ).
I edited my dts file to be the most basic to boot linux (attached).
I booted my eval board with "DEBUG" and I got this.
## Transferring control to Linux (at address 00000000) ...
[ 0.000000] -> early_init_devtree()
[ 0.000000] search "chosen", depth: 0, uname:
[ 0.000000] search "chosen", depth: 1, uname: cpus
[ 0.000000] search "chosen", depth: 2, uname: PowerPC,5200@0
[ 0.000000] search "chosen", depth: 1, uname: memory
However, even with DEBUG enabled I dont get a single charecter out
from the custom board.
What am I doing wrong ?
thanks in advance.
regards
prady
[-- Attachment #2: lite5200b_2_6_21.dts --]
[-- Type: application/octet-stream, Size: 8874 bytes --]
/*
* Lite5200B board Device Tree Source
*
* Copyright 2006-2007 Secret Lab Technologies Ltd.
* Grant Likely <grant.likely@secretlab.ca>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/*
* WARNING: Do not depend on this tree layout remaining static just yet.
* The MPC5200 device tree conventions are still in flux
* Keep an eye on the linuxppc-dev mailing list for more details
*/
/ {
model = "fsl,lite5200b";
// revision = "1.0";
compatible = "fsl,lite5200b\0generic-mpc5200";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>;
i-cache-line-size = <20>;
d-cache-size = <4000>; // L1, 16K
i-cache-size = <4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
32-bit;
};
};
memory {
device_type = "memory";
// reg = <00000000 10000000>; // 256MB
reg = <00000000 04000000>; // 64MB
};
soc5200@f0000000 {
model = "fsl,mpc5200b";
revision = ""; // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
ranges = <0 f0000000 f0010000>;
reg = <f0000000 00010000>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "mpc5200b-cdm\0mpc5200-cdm";
reg = <200 38>;
};
pic@500 {
// 5200 interrupts are encoded into two levels;
linux,phandle = <500>;
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
compatible = "mpc5200b-pic\0mpc5200-pic";
reg = <500 80>;
built-in;
};
// gpt@600 { // General Purpose Timer
// compatible = "mpc5200b-gpt\0mpc5200-gpt";
// device_type = "gpt";
// cell-index = <0>;
// reg = <600 10>;
// interrupts = <1 9 0>;
// interrupt-parent = <500>;
// has-wdt;
// };
// gpt@610 { // General Purpose Timer
// compatible = "mpc5200b-gpt\0mpc5200-gpt";
// device_type = "gpt";
// cell-index = <1>;
// reg = <610 10>;
// interrupts = <1 a 0>;
// interrupt-parent = <500>;
// };
// gpt@620 { // General Purpose Timer
// compatible = "mpc5200b-gpt\0mpc5200-gpt";
// device_type = "gpt";
// cell-index = <2>;
// reg = <620 10>;
// interrupts = <1 b 0>;
// interrupt-parent = <500>;
// };
// gpt@630 { // General Purpose Timer
// compatible = "mpc5200b-gpt\0mpc5200-gpt";
// device_type = "gpt";
// cell-index = <3>;
// reg = <630 10>;
// interrupts = <1 c 0>;
// interrupt-parent = <500>;
// };
// gpt@640 { // General Purpose Timer
// compatible = "mpc5200b-gpt\0mpc5200-gpt";
// device_type = "gpt";
// cell-index = <4>;
// reg = <640 10>;
// interrupts = <1 d 0>;
// interrupt-parent = <500>;
// };
// gpt@650 { // General Purpose Timer
// compatible = "mpc5200b-gpt\0mpc5200-gpt";
// device_type = "gpt";
// cell-index = <5>;
// reg = <650 10>;
// interrupts = <1 e 0>;
// interrupt-parent = <500>;
// };
// gpt@660 { // General Purpose Timer
// compatible = "mpc5200b-gpt\0mpc5200-gpt";
// device_type = "gpt";
// cell-index = <6>;
// reg = <660 10>;
// interrupts = <1 f 0>;
// interrupt-parent = <500>;
// };
// gpt@670 { // General Purpose Timer
// compatible = "mpc5200b-gpt\0mpc5200-gpt";
// device_type = "gpt";
// cell-index = <7>;
// reg = <670 10>;
// interrupts = <1 10 0>;
// interrupt-parent = <500>;
// };
// rtc@800 { // Real time clock
// compatible = "mpc5200b-rtc\0mpc5200-rtc";
// device_type = "rtc";
// reg = <800 100>;
// interrupts = <1 5 0 1 6 0>;
// interrupt-parent = <500>;
// };
// mscan@900 {
// device_type = "mscan";
// compatible = "mpc5200b-mscan\0mpc5200-mscan";
// cell-index = <0>;
// interrupts = <2 11 0>;
// interrupt-parent = <500>;
// reg = <900 80>;
// };
// mscan@980 {
// device_type = "mscan";
// compatible = "mpc5200b-mscan\0mpc5200-mscan";
// cell-index = <1>;
// interrupts = <1 12 0>;
// interrupt-parent = <500>;
// reg = <980 80>;
// };
// gpio@b00 {
// compatible = "mpc5200b-gpio\0mpc5200-gpio";
// reg = <b00 40>;
// interrupts = <1 7 0>;
// interrupt-parent = <500>;
// };
// gpio-wkup@b00 {
// compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
// reg = <c00 40>;
// interrupts = <1 8 0 0 3 0>;
// interrupt-parent = <500>;
// };
// pci@0d00 {
// #interrupt-cells = <1>;
// #size-cells = <2>;
// #address-cells = <3>;
// device_type = "pci";
// compatible = "mpc5200b-pci\0mpc5200-pci";
// reg = <d00 100>;
// interrupt-map-mask = <f800 0 0 7>;
// interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot
// c000 0 0 2 500 1 1 3
// c000 0 0 3 500 1 2 3
// c000 0 0 4 500 1 3 3
//
// c800 0 0 1 500 1 1 3 // 2nd slot
// c800 0 0 2 500 1 2 3
// c800 0 0 3 500 1 3 3
// c800 0 0 4 500 0 0 3>;
// clock-frequency = <0>; // From boot loader
// interrupts = <2 8 0 2 9 0 2 a 0>;
// interrupt-parent = <500>;
// bus-range = <0 0>;
// ranges = <42000000 0 80000000 80000000 0 20000000
// 02000000 0 a0000000 a0000000 0 10000000
// 01000000 0 00000000 b0000000 0 01000000>;
// };
// spi@f00 {
// device_type = "spi";
// compatible = "mpc5200b-spi\0mpc5200-spi";
// reg = <f00 20>;
// interrupts = <2 d 0 2 e 0>;
// interrupt-parent = <500>;
// };
// usb@1000 {
// device_type = "usb-ohci-be";
// compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
// reg = <1000 ff>;
// interrupts = <2 6 0>;
// interrupt-parent = <500>;
// };
// bestcomm@1200 {
// device_type = "dma-controller";
// compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm";
// reg = <1200 80>;
// interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
// 3 4 0 3 5 0 3 6 0 3 7 0
// 3 8 0 3 9 0 3 a 0 3 b 0
// 3 c 0 3 d 0 3 e 0 3 f 0>;
// interrupt-parent = <500>;
// };
// xlb@1f00 {
// compatible = "mpc5200b-xlb\0mpc5200-xlb";
// reg = <1f00 100>;
// };
serial@2000 { // PSC1
device_type = "serial";
compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <2000 100>;
interrupts = <2 1 0>;
interrupt-parent = <500>;
};
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
// device_type = "sound";
// compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
// interrupt-parent = <500>;
//};
// PSC3 in CODEC mode example
//i2s@2400 { // PSC3
// device_type = "sound";
// compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
// interrupt-parent = <500>;
//};
// PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
// compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
// interrupt-parent = <500>;
//};
// PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
// compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
// interrupt-parent = <500>;
//};
// PSC6 in spi mode example
//spi@2c00 { // PSC6
// device_type = "spi";
// compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi";
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
// interrupt-parent = <500>;
//};
// ethernet@3000 {
// device_type = "network";
// compatible = "mpc5200b-fec\0mpc5200-fec";
// reg = <3000 800>;
// mac-address = [ 02 03 04 05 06 07 ]; // Bad!
// interrupts = <2 5 0>;
// interrupt-parent = <500>;
// };
// ata@3a00 {
// device_type = "ata";
// compatible = "mpc5200b-ata\0mpc5200-ata";
// reg = <3a00 100>;
// interrupts = <2 7 0>;
// interrupt-parent = <500>;
// };
// i2c@3d00 {
// device_type = "i2c";
// compatible = "mpc5200b-i2c\0mpc5200-i2c";
// cell-index = <0>;
// reg = <3d00 40>;
// interrupts = <2 f 0>;
// interrupt-parent = <500>;
// };
//
// i2c@3d40 {
// device_type = "i2c";
// compatible = "mpc5200b-i2c\0mpc5200-i2c";
// cell-index = <1>;
// reg = <3d40 40>;
// interrupts = <2 10 0>;
// interrupt-parent = <500>;
// };
// sram@8000 {
// device_type = "sram";
// compatible = "mpc5200b-sram\0mpc5200-sram\0sram";
// reg = <8000 4000>;
// };
};
};
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: lite5200b, trouble with dtb
2007-05-21 11:53 lite5200b, trouble with dtb Pradyumna Sampath
@ 2007-05-29 5:41 ` Pradyumna Sampath
0 siblings, 0 replies; 2+ messages in thread
From: Pradyumna Sampath @ 2007-05-29 5:41 UTC (permalink / raw)
To: linuxppc-embedded
On 5/21/07, Pradyumna Sampath <pradyumna.sampath@gmail.com> wrote:
> Hi everyone,
>
> Last time around (
> http://www.mail-archive.com/linuxppc-embedded@ozlabs.org/msg02602.html
> ) , I was trying to boot my lite5200 eval board with v2.6.20-rt3 and
> was advised to boot with the dtb files.
>
> This time around Im trying to boot my custom lite5200B board with the
> dtb file thats comes with the vanilla kernel and it hangs at the same
> point ( "Transferring control to linux (at address 00000000 ..." ).
<snip..>
Finally figured it out. As silly as it may sound it took me a while to
find out. My command line arguments were:
set bootargs console=ttyPSC0, 115200 ip=10.140.56.238
root=/dev/mtdblock0 rootfstype=jffs2 ; tftp 0x400000 uImage ; tftp
0x600000 lite5200b_22.dtb ; bootm 0x400000 - 0x600000 ;
The problem was
set bootargs console=ttyPSC0, 115200 ip=10.140.56.238
root=/dev/mtdblock0 ....<snip..>
^^
Yes, it was the space between the "," and "115200". Just putting it on
record so that other people dont spend as much time on fixing this
silly problem.
regards
Prady
--
htp://prady.livejournal.com
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