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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: mikey@neuling.org, pedromfc@linux.ibm.com,
	linux-kernel@vger.kernel.org, paulus@samba.org,
	jniethe5@gmail.com, rogealve@linux.ibm.com,
	naveen.n.rao@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v5 4/8] powerpc/watchpoint: Move DAWR detection logic outside of hw_breakpoint.c
Date: Tue, 25 Aug 2020 13:48:24 +0200	[thread overview]
Message-ID: <f9bda668-01e7-8e72-100c-6c8ad40a63e9@csgroup.eu> (raw)
In-Reply-To: <59ac33ed-4ed3-2c92-7b0b-1d14abf7186b@linux.ibm.com>



Le 25/08/2020 à 13:08, Ravi Bangoria a écrit :
> Hi Christophe,
> 
>>> +static int cache_op_size(void)
>>> +{
>>> +#ifdef __powerpc64__
>>> +    return ppc64_caches.l1d.block_size;
>>> +#else
>>> +    return L1_CACHE_BYTES;
>>> +#endif
>>> +}
>>
>> You've got l1_dcache_bytes() in arch/powerpc/include/asm/cache.h to do 
>> that.
>>
>>> +
>>> +void wp_get_instr_detail(struct pt_regs *regs, struct ppc_inst *instr,
>>> +             int *type, int *size, unsigned long *ea)
>>> +{
>>> +    struct instruction_op op;
>>> +
>>> +    if (__get_user_instr_inatomic(*instr, (void __user *)regs->nip))
>>> +        return;
>>> +
>>> +    analyse_instr(&op, regs, *instr);
>>> +    *type = GETTYPE(op.type);
>>> +    *ea = op.ea;
>>> +#ifdef __powerpc64__
>>> +    if (!(regs->msr & MSR_64BIT))
>>> +        *ea &= 0xffffffffUL;
>>> +#endif
>>
>> This #ifdef is unneeded, it should build fine on a 32 bits too.
> 
> This patch is just a code movement from one file to another.
> I don't really change the logic. Would you mind if I do a
> separate patch for these changes (not a part of this series)?

Sure, do it in a separate patch.

Christophe

  reply	other threads:[~2020-08-25 11:50 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-25  4:36 [PATCH v5 0/8] powerpc/watchpoint: Bug fixes plus new feature flag Ravi Bangoria
2020-08-25  4:36 ` [PATCH v5 1/8] powerpc/watchpoint: Fix quarword instruction handling on p10 predecessors Ravi Bangoria
2020-08-25  4:36 ` [PATCH v5 2/8] powerpc/watchpoint: Fix handling of vector instructions Ravi Bangoria
2020-08-25  4:36 ` [PATCH v5 3/8] powerpc/watchpoint/ptrace: Fix SETHWDEBUG when CONFIG_HAVE_HW_BREAKPOINT=N Ravi Bangoria
2020-08-25  4:36 ` [PATCH v5 4/8] powerpc/watchpoint: Move DAWR detection logic outside of hw_breakpoint.c Ravi Bangoria
2020-08-25  9:30   ` Christophe Leroy
2020-08-25 11:08     ` Ravi Bangoria
2020-08-25 11:48       ` Christophe Leroy [this message]
2020-08-27  0:59   ` kernel test robot
2020-08-25  4:36 ` [PATCH v5 5/8] powerpc/watchpoint: Fix exception handling for CONFIG_HAVE_HW_BREAKPOINT=N Ravi Bangoria
2020-08-25  9:37   ` Christophe Leroy
2020-08-25 11:07     ` Ravi Bangoria
2020-08-25 12:06       ` Christophe Leroy
2020-08-25  4:36 ` [PATCH v5 6/8] powerpc/watchpoint: Add hw_len wherever missing Ravi Bangoria
2020-08-25  4:36 ` [PATCH v5 7/8] powerpc/watchpoint/ptrace: Introduce PPC_DEBUG_FEATURE_DATA_BP_ARCH_31 Ravi Bangoria
2020-08-25  4:36 ` [PATCH v5 8/8] powerpc/watchpoint/selftests: Tests for kernel accessing user memory Ravi Bangoria

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