From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from wr-out-0506.google.com (wr-out-0506.google.com [64.233.184.239]) by ozlabs.org (Postfix) with ESMTP id AD07BDDE2E for ; Thu, 22 Nov 2007 10:47:53 +1100 (EST) Received: by wr-out-0506.google.com with SMTP id 68so1001399wri for ; Wed, 21 Nov 2007 15:47:52 -0800 (PST) Message-ID: Date: Wed, 21 Nov 2007 16:47:52 -0700 From: "Grant Likely" Sender: glikely@secretlab.ca To: "Benjamin Herrenschmidt" Subject: Re: [PATCH 12/14] powerpc: Add early udbg support for 40x processors In-Reply-To: <20071121061555.55B06DDFA8@ozlabs.org> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 References: <20071121061555.55B06DDFA8@ozlabs.org> Cc: linuxppc-dev@ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On 11/20/07, Benjamin Herrenschmidt wrote: > This adds some basic real mode based early udbg support for 40x > in order to debug things more easily > > Signed-off-by: Benjamin Herrenschmidt > --- > --- linux-work.orig/arch/powerpc/platforms/Kconfig.cputype 2007-11-21 12:50:16.000000000 +1100 > +++ linux-work/arch/powerpc/platforms/Kconfig.cputype 2007-11-21 12:50:18.000000000 +1100 > @@ -43,6 +43,7 @@ config 40x > bool "AMCC 40x" > select PPC_DCR_NATIVE > select WANT_DEVICE_TREE > + select PPC_UDBG_16550 Unfortunately, this isn't always true. The Xilinx Virtex parts us config 40x, but not all FPGA bitstreams have a 16550 serial port. Sometimes it's a uartlite instead. Cheers, g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. grant.likely@secretlab.ca (403) 399-0195