Re: [PATCH 12/14] powerpc: Add early udbg support for 40x processors

["Grant Likely" <grant.likely@secretlab.ca>]

On 11/21/07, Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> On Wed, 2007-11-21 at 16:47 -0700, Grant Likely wrote:
> > On 11/20/07, Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> > > This adds some basic real mode based early udbg support for 40x
> > > in order to debug things more easily
> > >
> > > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > > ---
> > > --- linux-work.orig/arch/powerpc/platforms/Kconfig.cputype      2007-11-21 12:50:16.000000000 +1100
> > > +++ linux-work/arch/powerpc/platforms/Kconfig.cputype   2007-11-21 12:50:18.000000000 +1100
> > > @@ -43,6 +43,7 @@ config 40x
> > >         bool "AMCC 40x"
> > >         select PPC_DCR_NATIVE
> > >         select WANT_DEVICE_TREE
> > > +       select PPC_UDBG_16550
> >
> > Unfortunately, this isn't always true.  The Xilinx Virtex parts us
> > config 40x, but not all FPGA bitstreams have a 16550 serial port.
> > Sometimes it's a uartlite instead.
>
> What does uartlite looks like ?

fixed speed
4 registers: rx, tx, status & control

rx & tx are... well... rx and tx registers
status has a number of bits reporting fifos full/empty etc.
control has three bits; reset tx, reset rx and interrupt enable.

See the top of drivers/serial/uartlite.c

Very simple stuff; but definitely not 16550.

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195