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From: "Grant Likely" <grant.likely@secretlab.ca>
To: "Scott Wood" <scottwood@freescale.com>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: How to describe FPGA-based devices in the device tree ?
Date: Mon, 18 Feb 2008 11:30:07 -0700	[thread overview]
Message-ID: <fa686aa40802181030u4f411172wf7123b14d4a6042@mail.gmail.com> (raw)
In-Reply-To: <20080218174701.GA3835@loki.buserror.net>

On Feb 18, 2008 10:47 AM, Scott Wood <scottwood@freescale.com> wrote:
> On Mon, Feb 18, 2008 at 01:43:52PM +0100, Laurent Pinchart wrote:
> > Should I put IP core nodes as children of the FPGA node ?
>
> You could do that as well.

I'd recommend doing that, then your subnodes are isolated from changes
to the bus attachment (chipselect).  (really an insignificant point,
but I think it is a more logical layout).

So, something like this:
fpga@4,0 {
        #address-cells = <1>;
        #size-cells = <1>;
        ranges = <0 4 0 00100000>;
        /* breakdown of 'ranges' fields: */
        /* "0": start address of internal range */
        /* "4 0": start address of external range (chip select 4, address 0) */
        /* "00100000: size of range */

        iocore@0 {
                compatible = "foo,bar";
                reg = <0 00010000>;
        };

        iocore@10000 {
                compatible = "foo,bar";
                reg = <10000 00010000>;
        };

        iocore@20000 {
                compatible = "foo,bar";
                reg = <20000 00010000>;
        };
};

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

      reply	other threads:[~2008-02-18 18:30 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-02-18 12:43 How to describe FPGA-based devices in the device tree ? Laurent Pinchart
2008-02-18 17:47 ` Scott Wood
2008-02-18 18:30   ` Grant Likely [this message]

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