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From: "Grant Likely" <grant.likely@secretlab.ca>
To: "John Linn" <john.linn@xilinx.com>,
	linuxppc-dev@ozlabs.org, grant.likely@secretlab.ca
Subject: Re: [PATCH 3/3][POWERPC][V2] Xilinx: boot support for Xilinx uart 16550.
Date: Wed, 2 Apr 2008 19:16:29 -0600	[thread overview]
Message-ID: <fa686aa40804021816k1b109319r62ca6a6ce6a3a65@mail.gmail.com> (raw)
In-Reply-To: <20080403000229.GA6663@localhost.localdomain>

On Wed, Apr 2, 2008 at 6:02 PM, David Gibson
<david@gibson.dropbear.id.au> wrote:
>
> On Wed, Apr 02, 2008 at 09:52:14AM -0700, John Linn wrote:
>  > The Xilinx 16550 uart core is not a standard 16550 because it uses
>  > word-based addressing rather than byte-based adressing. With
>  > additional properties it is compatible with the open firmware
>  > 'ns16550' compatible binding.
>  >
>  > This code updates the ns16550 driver to use the reg-offset property
>  > so that the Xilinx UART 16550 can be used with it. The reg-shift
>  > was already being handled.
>  >
>  > Signed-off-by: John Linn <john.linn@xilinx.com>
>  > ---
>  >  arch/powerpc/boot/ns16550.c |    5 +++++
>  >  1 files changed, 5 insertions(+), 0 deletions(-)
>  >
>  > diff --git a/arch/powerpc/boot/ns16550.c b/arch/powerpc/boot/ns16550.c
>  > index f8f1b2f..da9d2c2 100644
>  > --- a/arch/powerpc/boot/ns16550.c
>  > +++ b/arch/powerpc/boot/ns16550.c
>  > @@ -56,6 +56,7 @@ int ns16550_console_init(void *devp, struct serial_console_data *scdp)
>  >  {
>  >       int n;
>  >       unsigned long reg_phys;
>  > +     u32 reg_offset;
>  >
>  >       n = getprop(devp, "virtual-reg", &reg_base, sizeof(reg_base));
>  >       if (n != sizeof(reg_base)) {
>  > @@ -65,6 +66,10 @@ int ns16550_console_init(void *devp, struct serial_console_data *scdp)
>  >               reg_base = (void *)reg_phys;
>  >       }
>  >
>  > +     n = getprop(devp, "reg-offset", &reg_offset, sizeof(reg_offset));
>  > +     if (n == sizeof(reg_offset))
>  > +             reg_base += reg_offset;
>
>  Uh... how does the behaviour of reg-offset differ from just bumping
>  the address in "reg"?

Mostly because the registers are actually 32 bit registers that can be
accessed with 32bit reads at offset 0.  Using this property keeps the
reg property describing the real address range.

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

  reply	other threads:[~2008-04-03  1:16 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <12071551351007-git-send-email-john.linn@xilinx.com>
2008-04-02 16:52 ` [PATCH 3/3][POWERPC][V2] Xilinx: boot support for Xilinx uart 16550 John Linn
2008-04-02 17:52   ` Grant Likely
2008-04-03  0:02   ` David Gibson
2008-04-03  1:16     ` Grant Likely [this message]
2008-04-03 13:23   ` Johann Baudy
2008-04-03 13:28     ` John Linn
2008-04-03 14:05       ` Grant Likely
     [not found] ` <12071551354058-git-send-email-john.linn@xilinx.com>
2008-04-02 16:52   ` [PATCH 2/3][POWERPC][V2] Xilinx: of_serial " John Linn
2008-04-02 18:00     ` Grant Likely
2008-04-02 18:20       ` John Linn
2008-04-02 19:27         ` Grant Likely
2008-04-02 19:19     ` Sergei Shtylyov

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