* [PATCH 4/4 v2] mtd/powerpc: Describe multiple "reg" tuples usage
@ 2009-04-07 8:39 Stefan Roese
2009-04-12 6:05 ` Grant Likely
0 siblings, 1 reply; 2+ messages in thread
From: Stefan Roese @ 2009-04-07 8:39 UTC (permalink / raw)
To: linuxppc-dev, linux-mtd; +Cc: devicetree-discuss
Signed-off-by: Stefan Roese <sr@denx.de>
CC: Grant Likely <grant.likely@secretlab.ca>
---
Documentation/powerpc/dts-bindings/mtd-physmap.txt | 20 +++++++++++++++++++-
1 files changed, 19 insertions(+), 1 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/mtd-physmap.txt b/Documentation/powerpc/dts-bindings/mtd-physmap.txt
index ab1115e..a3fa9e0 100644
--- a/Documentation/powerpc/dts-bindings/mtd-physmap.txt
+++ b/Documentation/powerpc/dts-bindings/mtd-physmap.txt
@@ -5,7 +5,10 @@ file systems on embedded devices.
- compatible : should contain the specific model of flash chip(s)
used, if known, followed by either "cfi-flash" or "jedec-flash"
- - reg : Address range of the flash chip
+ - reg : Address range(s) of the flash chip(s)
+ It's possible to (optionally) define multiple "reg" tuples so that the
+ Intel P30 48F4400 chip which consists internally of 2 non-identical
+ NOR chips on one die can also be supported.
- bank-width : Width (in bytes) of the flash bank. Equal to the
device width times the number of interleaved chips.
- #address-cells, #size-cells : Must be present if the flash has
@@ -58,3 +61,18 @@ Example:
read-only;
};
};
+
+Here an example with multiple "reg" tuples (e.g. Intel P30):
+
+ flash@f0000000,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0 0x00000000 0x02000000
+ 0 0x02000000 0x02000000>;
+ bank-width = <2>;
+ partition@0 {
+ label = "test-part1";
+ reg = <0 0x04000000>;
+ };
+ };
--
1.6.2.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 4/4 v2] mtd/powerpc: Describe multiple "reg" tuples usage
2009-04-07 8:39 [PATCH 4/4 v2] mtd/powerpc: Describe multiple "reg" tuples usage Stefan Roese
@ 2009-04-12 6:05 ` Grant Likely
0 siblings, 0 replies; 2+ messages in thread
From: Grant Likely @ 2009-04-12 6:05 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev, devicetree-discuss, linux-mtd
On Tue, Apr 7, 2009 at 2:39 AM, Stefan Roese <sr@denx.de> wrote:
> Signed-off-by: Stefan Roese <sr@denx.de>
> CC: Grant Likely <grant.likely@secretlab.ca>
> ---
> =A0Documentation/powerpc/dts-bindings/mtd-physmap.txt | =A0 20 ++++++++++=
+++++++++-
> =A01 files changed, 19 insertions(+), 1 deletions(-)
>
> diff --git a/Documentation/powerpc/dts-bindings/mtd-physmap.txt b/Documen=
tation/powerpc/dts-bindings/mtd-physmap.txt
> index ab1115e..a3fa9e0 100644
> --- a/Documentation/powerpc/dts-bindings/mtd-physmap.txt
> +++ b/Documentation/powerpc/dts-bindings/mtd-physmap.txt
> @@ -5,7 +5,10 @@ file systems on embedded devices.
>
> =A0- compatible : should contain the specific model of flash chip(s)
> =A0 =A0used, if known, followed by either "cfi-flash" or "jedec-flash"
> - - reg : Address range of the flash chip
> + - reg : Address range(s) of the flash chip(s)
> + =A0 It's possible to (optionally) define multiple "reg" tuples so that =
the
> + =A0 Intel P30 48F4400 chip which consists internally of 2 non-identical
> + =A0 NOR chips on one die can also be supported.
This isn't a P30 48F4400 specific feature, even if it is the only
current user. This description works for any arrangement of multiple
NOR chips. I isn't really appropriate to mention the P30 in this way
and it should be more generic.
> =A0- bank-width : Width (in bytes) of the flash bank. =A0Equal to the
> =A0 =A0device width times the number of interleaved chips.
> =A0- #address-cells, #size-cells : Must be present if the flash has
> @@ -58,3 +61,18 @@ Example:
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0read-only;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0};
> =A0 =A0 =A0 =A0};
> +
> +Here an example with multiple "reg" tuples (e.g. Intel P30):
However, it is completely appropriate to mention P30 here because it
is in the context of an example.
> +
> + =A0 =A0 =A0 flash@f0000000,0 {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 #address-cells =3D <1>;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 #size-cells =3D <1>;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D "cfi-flash";
For best practice, compatible should also specify the exact chip in this ca=
se.
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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