Re: [PATCH] [V3] Xilinx : Framebuffer Driver: Add PLB support and cleanup DCR

[Grant Likely <grant.likely@secretlab.ca>]

On Wed, Apr 15, 2009 at 9:58 AM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
>> > - =A0 =A0 =A0 rc =3D of_address_to_resource(op->node, 0, &res);
>> > - =A0 =A0 =A0 if (rc) {
>> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&op->dev, "invalid address\n");
>> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
>> > + =A0 =A0 =A0 /*
>> > + =A0 =A0 =A0 =A0* To check whether the core is connected directly to =
DCR or PLB
>> > + =A0 =A0 =A0 =A0* interface and initialize the tft_access accordingly=
.
>> > + =A0 =A0 =A0 =A0*/
>> > + =A0 =A0 =A0 p =3D (u32 *)of_get_property(op->node, "xlnx,dcr-splb-sl=
ave-if", NULL);
>>
>> Hmmm. =A0This binding is undocumented. =A0It would be better to make the
>> decision on the presence/absence of the dcr-reg and/or reg properties.
>
> For backward compatibility with the 'old' way, the device tree generator =
for this core has both dcr-reg and reg properties (where the reg has been t=
ranslated back through the bridge).

So, what is in the regs and dcr-regs properties when DCR is used?

How about when MMIO is used?

g.


--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.