From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-gx0-f172.google.com (mail-gx0-f172.google.com [209.85.217.172]) by ozlabs.org (Postfix) with ESMTP id BB0B5DDFAD for ; Wed, 13 May 2009 14:03:43 +1000 (EST) Received: by gxk20 with SMTP id 20so789161gxk.9 for ; Tue, 12 May 2009 21:03:42 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20090513023614.GJ24338@yookeroo.seuss> References: <4A08593C.4010503@dlasys.net> <20090511183638.F07C01438054@mail184-wa4.bigfish.com> <4A08C599.2030100@dlasys.net> <20090512005554.EEE1019D009B@mail129-dub.bigfish.com> <4A08E050.9000302@dlasys.net> <20090512042733.8D4A21400054@mail184-dub.bigfish.com> <20090513001048.490B533005D@mail141-va3.bigfish.com> <20090513023614.GJ24338@yookeroo.seuss> From: Grant Likely Date: Tue, 12 May 2009 22:03:22 -0600 Message-ID: Subject: Re: device trees. To: Stephen Neuendorffer , Grant Likely , linuxppc-dev@ozlabs.org, "David H. Lynch Jr." Content-Type: text/plain; charset=ISO-8859-1 List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Tue, May 12, 2009 at 8:36 PM, David Gibson wrote: > On Tue, May 12, 2009 at 05:10:46PM -0700, Stephen Neuendorffer wrote: >> >> Another possibility is to pad the DTB with a DESYNC command and the >> correct pad frame, just in case it cannot be prevented. > > Um.. one thing I'm missing in this discussion of attaching the dtb to > the bitstream: =A0I don't see how the bitstream becomes accessible to > the kernel at runtime. =A0Unless you were exposing the dtb as part of > the fpga programming, but I thought you explicitly weren't doing that > because of limited bram space. > > I imagine this is simply due to my ignorance about FPGA techniques, > but if someone could enlighten me...? In this case the processor has access to the flash where the FPGA bitstreams are stored and a set of registers in a CPLD which tells it which bitstream was used to configure the FPGA. g. --=20 Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd.