From: Grant Likely <grant.likely@secretlab.ca>
To: Frank Prepelica <Frank.Prepelica@ubidyne.com>
Cc: linuxppc-dev@ozlabs.org
Subject: Re: Direct MII connection between MPC8313 and VIRTEX FPGA
Date: Tue, 30 Jun 2009 10:16:43 -0600 [thread overview]
Message-ID: <fa686aa40906300916h3718e50er88e1408be25e21c0@mail.gmail.com> (raw)
In-Reply-To: <29DC34A6B43468409F5A371CFE34E849D7EF7B@ex01.ads.ubidyne.de>
On Tue, Jun 30, 2009 at 2:35 AM, Frank
Prepelica<Frank.Prepelica@ubidyne.com> wrote:
>> What kernel version are you using?
>
> We are using kernel version 2.6.24. I've searched for "current speed" in =
version 2.6.28.7 and I've found that string.
>
>> Yes, you need to modify the DTB. =A0You have a back to back MII
>> connection, not a phy, so you do *not* want to have a PHY node in the
>> device tree.
>
> Hmm, but I do have a "PHY", don't I?. The "PHY" will be emulated in the F=
PGA. Of course, it's not a physical PHY but it should look like one.
No, it sounds like you don't. If you've got a back-to-back MII
connection, then you can fix the link speed and you don't need to do
any form of PHY emulation. ie. you don't need to wire up the MDIO
pins.
> So, do I really need the remove the complete PHY description in the DTB?
yes.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
next prev parent reply other threads:[~2009-07-01 0:12 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-30 8:35 AW: Direct MII connection between MPC8313 and VIRTEX FPGA Frank Prepelica
2009-06-30 16:16 ` Grant Likely [this message]
[not found] <Acn10GL8UFkH8grcTWecohRthafWswCvtYhQ>
2009-06-29 8:23 ` Frank Prepelica
2009-06-29 15:40 ` Grant Likely
-- strict thread matches above, loose matches on Subject: below --
2009-06-25 15:11 Frank Prepelica
2009-06-25 20:05 ` Grant Likely
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