From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from zproxy.gmail.com (zproxy.gmail.com [64.233.162.206]) by ozlabs.org (Postfix) with ESMTP id E1D4B67CA1 for ; Fri, 15 Jul 2005 01:11:26 +1000 (EST) Received: by zproxy.gmail.com with SMTP id z6so239622nzd for ; Thu, 14 Jul 2005 08:11:24 -0700 (PDT) Message-ID: Date: Thu, 14 Jul 2005 17:11:24 +0200 From: =?ISO-8859-1?Q?Anton_W=F6llert?= To: linuxppc-embedded@ozlabs.org In-Reply-To: Mime-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_19857_11295861.1121353884941" References: <42C1AAC1.4060702@gmail.com> <20050629085913.GA2153@logos.cnet> <20050701094438.GA11121@logos.cnet> <1120229717.21507.9.camel@jmcmullan.timesys> <20050701101713.GC11121@logos.cnet> Subject: ptrace on linux 2.6.12 causes oops Reply-To: =?ISO-8859-1?Q?Anton_W=F6llert?= List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , ------=_Part_19857_11295861.1121353884941 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline it's on a tqm850l with mpc850. i've done the following: in update_mmu_cache: if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) { // if (vma->vm_mm =3D=3D current->active_mm){ // _tlbie(address); // __flush_dcache_icache((void *) address); // } else __flush_dcache_icache(page _address(page)); // flush_dcache_icache_page(page); set_bit(PG_arch_1, &page->flags); } like it is in ppc64. now it works. the flush_dcache_icache_page calls=20 __flush_dcache_icache_phys, which temporary turns off the mmu for=20 data-addressing. a bit strange i think. but unfortunately i have too less= =20 knowledge about kernel-internal ppc-stuff :( anton ------=_Part_19857_11295861.1121353884941 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline it's on a tqm850l with mpc850. i've done the following:

in update_mmu_cache:

            &nb= sp;   if (!PageReserved(page)
            &nb= sp;       && !test_bit(PG_arch_1, &page->flags)) {
//            &= nbsp;         if (vma->vm_mm =3D=3D current->active_mm){
//            &= nbsp;           &nbs= p;     _tlbie(address);
//            &= nbsp;           &nbs= p;     __flush_dcache_icache((void *) address);
//            &= nbsp;         } else
            &nb= sp;            =        __flush_dcache_icache(page _address(page));
//         &n= bsp;            = ;        flush_dcache_icache_page(page);
            &nb= sp;          
            &nb= sp;           set_bit(PG_arch_1, &page->flags);
            &nb= sp;   }

like it is in ppc64. now it works. the flush_dcache_icache_page calls __flush_dcache_icache_phys, which temporary turns off the mmu for data-addressing. a bit strange i think. but unfortunately i have too less knowledge about kernel-internal ppc-stuff :(

anton
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