From: Radu Rendec <radu.rendec@gmail.com>
To: Daniel Axtens <dja@axtens.net>, Andreas Schwab <schwab@linux-m68k.org>
Cc: Paul Mackerras <paulus@samba.org>,
linuxppc-dev@lists.ozlabs.org, Oleg Nesterov <oleg@redhat.com>
Subject: Re: [PATCH 0/1] PPC32: fix ptrace() access to FPU registers
Date: Wed, 19 Jun 2019 08:57:07 -0400 [thread overview]
Message-ID: <fd936660cde0d5f151b732d0f885ddf0b6ba67eb.camel@gmail.com> (raw)
In-Reply-To: <87k1di2yxg.fsf@dja-thinkpad.axtens.net>
On Wed, 2019-06-19 at 10:36 +1000, Daniel Axtens wrote:
> Andreas Schwab <
> schwab@linux-m68k.org
> > writes:
>
> > On Jun 18 2019, Radu Rendec <
> > radu.rendec@gmail.com
> > > wrote:
> >
> > > Since you already have a working setup, it would be nice if you could
> > > add a printk to arch_ptrace() to print the address and confirm what I
> > > believe happens (by reading the gdb source code).
> >
> > A ppc32 ptrace syscall goes through compat_arch_ptrace.
Right. I completely overlooked that part.
> Ah right, and that (in ptrace32.c) contains code that will work:
>
>
> /*
> * the user space code considers the floating point
> * to be an array of unsigned int (32 bits) - the
> * index passed in is based on this assumption.
> */
> tmp = ((unsigned int *)child->thread.fp_state.fpr)
> [FPRINDEX(index)];
>
> FPRINDEX is defined above to deal with the various manipulations you
> need to do.
Correct. Basically it does the same that I did in my patch: it divides
the index again by 2 (it's already divided by 4 in compat_arch_ptrace()
so it ends up divided by 8), then takes the least significant bit and
adds it to the index. I take bit 2 of the original address, which is the
same thing (because in FPRHALF() the address is already divided by 4).
So we have this in ptrace32.c:
#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1)
#define FPRHALF(i) (((i) - PT_FPR0) & 1)
#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) * 2 + FPRHALF(i)
index = (unsigned long) addr >> 2;
(unsigned int *)child->thread.fp_state.fpr)[FPRINDEX(index)]
And we have this in my patch:
fpidx = (addr - PT_FPR0 * sizeof(long)) / 8;
(void *)&child->thread.TS_FPR(fpidx) + (addr & 4)
> Radu: I think we want to copy that working code back into ptrace.c.
I'm not sure that would work. There's a subtle difference: the code in
ptrace32.c is always compiled on a 64-bit kernel and the user space
calling it is always 32-bit; on the other hand, the code in ptrace.c can
be compiled on either a 64-bit kernel or a 32-bit kernel and the user
space calling it always has the same "bitness" as the kernel.
One difference is the size of the CPU registers. On 64-bit they are 8
byte long and user space knows that and generates 8-byte aligned
addresses. So you have to divide the address by 8 to calculate the CPU
register index correctly, which compat_arch_ptrace() currently doesn't.
Another difference is that on 64-bit `long` is 8 bytes, so user space
can read a whole FPU register in a single ptrace call.
Now that we are all aware of compat_arch_ptrace() (which handles the
special case of a 32-bit process running on a 64-bit kernel) I would say
the patch is correct and does the right thing for both 32-bit and 64-bit
kernels and processes.
> The challenge will be unpicking the awful mess of ifdefs in ptrace.c
> and making it somewhat more comprehensible.
I'm not sure what ifdefs you're thinking about. The only that are used
inside arch_ptrace() are PT_FPR0, PT_FPSCR and TS_FPR, which seem to be
correct.
But perhaps it would be useful to change my patch and add a comment just
before arch_ptrace() that explains how the math is done and that the
code must work on both 32-bit and 64-bit, the user space address
assumptions, etc.
By the way, I'm not sure the code in compat_arch_ptrace() handles
PT_FPSCR correctly. It might (just because fpscr is right next to fpr[]
in memory - and that's a hack), but I can't figure out if it accesses
the right half.
Radu
next prev parent reply other threads:[~2019-06-19 12:59 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-10 23:27 [PATCH 0/1] PPC32: fix ptrace() access to FPU registers Radu Rendec
2019-06-10 23:27 ` [PATCH 1/1] " Radu Rendec
2019-06-13 7:59 ` [PATCH 0/1] " Daniel Axtens
2019-06-17 1:19 ` Daniel Axtens
2019-06-17 2:27 ` Radu Rendec
2019-06-18 6:42 ` Daniel Axtens
2019-06-18 12:16 ` Radu Rendec
[not found] ` <fbf9f9cbb99fc40c7d7af86fee3984427c61b799.camel__46559.9162316479$1560860409$gmane$org@gmail.com>
2019-06-18 18:09 ` Andreas Schwab
2019-06-19 0:36 ` Daniel Axtens
2019-06-19 12:57 ` Radu Rendec [this message]
2021-06-11 6:02 ` Christophe Leroy
2021-06-11 14:37 ` Radu Rendec
2021-07-18 18:07 ` Radu Rendec
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