Re: [PATCH V2] cxl: Fix timebase synchronization status on P9

[Frederic Barrat <fbarrat@linux.vnet.ibm.com>]

Le 16/02/2018 à 11:02, Vaibhav Jain a écrit :
> Frederic Barrat <fbarrat@linux.vnet.ibm.com> writes:
> 
>> I'm also wondering if it wouldn't be simpler to always update the
>> timebase_synced flag dynamically, even on p8. That way we wouldn't need
>> to have the p8 specific code to check for synchronization in
>> cxl_setup_psl_timebase(). p8 and p9 code would be the same.
> 
> I am wondering if we can have an implementation like this:
> 
> static ssize_t psl_timebase_synced_show(struct device *device,
> {
>    	struct cxl *adapter = to_cxl_adapter(device);
>          
>          /* if not already synced than force a resync */
>          if (!adapter->psl_timebase_synced)
>                  /* Choose appropriate PSL implementation */
>                  adapter->native->sl_ops->psl_sync_timebase(adapter);
> 
>     	return scnprintf(buf, PAGE_SIZE, "%i\n", adapter->psl_timebase_synced);
> }
> 
> In case of PSL9 if timebase request from PSL->CAPP fails then PSL will
> send an error interrupt. This can be used to set the
> 'psl_timebase_synced' flag back to false if timebase ever fails.

I kind of like recomputing the status with every call. It takes care of 
outdated status and could be helpful after a reset for example.

As to relying on the PSL error interrupt, I wouldn't sweat too much 
about it. When we get one, the world stops spinning. So the timebase 
status is the least of our worries. Or did they add something so that we 
could find out that the PSL error interrupt is *only* due to a timebase 
sync pb? Note that recomputing it with every read also works in that 
case and is simpler.

   Fred