From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23E17C433DF for ; Tue, 4 Aug 2020 11:05:14 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8ED6B2075D for ; Tue, 4 Aug 2020 11:05:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8ED6B2075D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4BLX3B6CZKzDqLW for ; Tue, 4 Aug 2020 21:05:10 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=arm.com (client-ip=217.140.110.172; helo=foss.arm.com; envelope-from=valentin.schneider@arm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lists.ozlabs.org (Postfix) with ESMTP id 4BLX0s41SNzDqQ4 for ; Tue, 4 Aug 2020 21:03:07 +1000 (AEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 81C8430E; Tue, 4 Aug 2020 04:03:04 -0700 (PDT) Received: from e113632-lin (e113632-lin.cambridge.arm.com [10.1.194.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B5FBC3F6CF; Tue, 4 Aug 2020 04:03:02 -0700 (PDT) References: <20200804033307.76111-1-srikar@linux.vnet.ibm.com> <20200804033307.76111-2-srikar@linux.vnet.ibm.com> <20200804104642.GC2657@hirez.programming.kicks-ass.net> User-agent: mu4e 0.9.17; emacs 26.3 From: Valentin Schneider To: peterz@infradead.org Subject: Re: [PATCH 2/2] powerpc/topology: Override cpu_smt_mask In-reply-to: <20200804104642.GC2657@hirez.programming.kicks-ass.net> Date: Tue, 04 Aug 2020 12:02:49 +0100 Message-ID: MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gautham R Shenoy , Michael Neuling , Vincent Guittot , Srikar Dronamraju , Rik van Riel , linuxppc-dev , LKML , Dietmar Eggemann , Thomas Gleixner , Mel Gorman , Ingo Molnar Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 04/08/20 11:46, peterz@infradead.org wrote: > On Tue, Aug 04, 2020 at 09:03:07AM +0530, Srikar Dronamraju wrote: >> On Power9 a pair of cores can be presented by the firmware as a big-core >> for backward compatibility reasons, with 4 threads per (small) core and 8 >> threads per big-core. cpu_smt_mask() should generally point to the cpu mask >> of the (small)core. >> >> In order to maintain userspace backward compatibility (with Power8 chips in >> case of Power9) in enterprise Linux systems, the topology_sibling_cpumask >> has to be set to big-core. Hence override the default cpu_smt_mask() to be >> powerpc specific allowing for better scheduling behaviour on Power. > > Why does Linux userspace care about this? Ditto; from [1], a core contains CPUs that all share the same L1 (and capacity, as per SD_SHARE_CPUCAPACITY). So IMO it makes perfect sense to have a first domain spanning L1, and its parent spanning L2 - that means topology_sibling_cpumask *itself* should span a single core rather than a pair. [1]: https://lkml.kernel.org/r/jhjr1sviswg.mognet@arm.com